From patchwork Tue Jun 8 02:33:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Lin X-Patchwork-Id: 12305127 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96BE9C47082 for ; Tue, 8 Jun 2021 02:33:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7B0D46128A for ; Tue, 8 Jun 2021 02:33:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230446AbhFHCfG (ORCPT ); Mon, 7 Jun 2021 22:35:06 -0400 Received: from lucky1.263xmail.com ([211.157.147.130]:45164 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230261AbhFHCfF (ORCPT ); Mon, 7 Jun 2021 22:35:05 -0400 Received: from localhost (unknown [192.168.167.16]) by lucky1.263xmail.com (Postfix) with ESMTP id 0D8A2D1DAD; Tue, 8 Jun 2021 10:33:12 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P32529T140357266978560S1623119587131429_; Tue, 08 Jun 2021 10:33:12 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: X-RL-SENDER: jon.lin@rock-chips.com X-SENDER: jon.lin@rock-chips.com X-LOGIN-NAME: jon.lin@rock-chips.com X-FST-TO: linux-spi@vger.kernel.org X-RCPT-COUNT: 17 X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-System-Flag: 0 From: Jon Lin To: linux-spi@vger.kernel.org Cc: jon.lin@rock-chips.com, broonie@kernel.org, robh+dt@kernel.org, heiko@sntech.de, jbx6244@gmail.com, hjc@rock-chips.com, yifeng.zhao@rock-chips.com, sugar.zhang@rock-chips.com, linux-rockchip@lists.infradead.org, linux-mtd@lists.infradead.org, p.yadav@ti.com, macroalpha82@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Chris Morgan Subject: [PATCH v6 7/8] arm64: dts: rockchip: Add SFC to RK3308 Date: Tue, 8 Jun 2021 10:33:04 +0800 Message-Id: <20210608023305.25371-3-jon.lin@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210608023305.25371-1-jon.lin@rock-chips.com> References: <20210608022644.21074-1-jon.lin@rock-chips.com> <20210608023305.25371-1-jon.lin@rock-chips.com> Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org From: Chris Morgan Add a devicetree entry for the Rockchip SFC for the RK3308 SOC. Signed-off-by: Chris Morgan Signed-off-by: Jon Lin --- Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None Changes in v1: None arch/arm64/boot/dts/rockchip/rk3308.dtsi | 37 ++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index 0c5fa9801e6f..f40feb08f3cf 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -637,6 +637,17 @@ status = "disabled"; }; + sfc: spi@ff4c0000 { + compatible = "rockchip,rk3308-sfc", "rockchip,rk3036-sfc"; + reg = <0x0 0xff4c0000 0x0 0x4000>; + interrupts = ; + clocks = <&cru HCLK_SFC>, <&cru SCLK_SFC>; + clock-names = "hclk_sfc", "clk_sfc"; + pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>; + pinctrl-names = "default"; + status = "disabled"; + }; + cru: clock-controller@ff500000 { compatible = "rockchip,rk3308-cru"; reg = <0x0 0xff500000 0x0 0x1000>; @@ -910,6 +921,32 @@ }; }; + serial_flash { + sfc_bus4: sfc-bus4 { + rockchip,pins = + <3 RK_PA0 3 &pcfg_pull_none>, + <3 RK_PA1 3 &pcfg_pull_none>, + <3 RK_PA2 3 &pcfg_pull_none>, + <3 RK_PA3 3 &pcfg_pull_none>; + }; + + sfc_bus2: sfc-bus2 { + rockchip,pins = + <3 RK_PA0 3 &pcfg_pull_none>, + <3 RK_PA1 3 &pcfg_pull_none>; + }; + + sfc_cs0: sfc-cs0 { + rockchip,pins = + <3 RK_PA4 3 &pcfg_pull_none>; + }; + + sfc_clk: sfc-clk { + rockchip,pins = + <3 RK_PA5 3 &pcfg_pull_none>; + }; + }; + gmac { rmii_pins: rmii-pins { rockchip,pins =