| Message ID | 20211011204619.81893-4-a-nandan@ti.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | mtd: spinand: Add Octal DTR SPI (8D-8D-8D) mode support | expand |
On Tue, 12 Oct 2021 02:16:08 +0530 Apurva Nandan <a-nandan@ti.com> wrote: > Currently, the op macros in spinand.h don't give the option to setup > any non-array access instructions for Dual/Quad/Octal DTR SPI bus. > Having a function that patches the op based on reg_proto would be > better than trying to write all the setup logic in op macros. > > Create a spimem_patch_op() that would patch cmd, addr, dummy and data > phase of the spi_mem op, for the given spinand->reg_proto. And hence, > call the spimem_patch_op() before executing any spi_mem op. I'm honestly not sure this rule will stand over time, and patching operations at submission time has a cost (ok, it's negligible compared to the IO duration, but still), so I'd rather see this done statically with all relevant macros taking an extra dtr argument. > > Note: In this commit, spimem_patch_op() isn't called in the > read_reg_op(), write_reg_op() and wait() functions, as they need > modifications in address value and data nbytes when in Octal DTR mode. > This will be fixed in a later commit. See, that's what I'm talking about. > > Signed-off-by: Apurva Nandan <a-nandan@ti.com> > --- > drivers/mtd/nand/spi/core.c | 49 +++++++++++++++++++++++++++++++++++++ > 1 file changed, 49 insertions(+) > > diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c > index d82a3e6d9bb5..11746d858f87 100644 > --- a/drivers/mtd/nand/spi/core.c > +++ b/drivers/mtd/nand/spi/core.c > @@ -20,6 +20,49 @@ > #include <linux/spi/spi.h> > #include <linux/spi/spi-mem.h> > > +/** > + * spinand_patch_op() - Helper function to patch the spi_mem op based on the > + * spinand->reg_proto > + * @spinand: the spinand device > + * @op: the spi_mem op to patch > + * > + * Set up buswidth and dtr fields for cmd, addr, dummy and data phase. Also > + * adjust cmd opcode and dummy nbytes. This function doesn't make any changes > + * to addr val or data buf. > + */ > +static void spinand_patch_op(const struct spinand_device *spinand, > + struct spi_mem_op *op) > +{ > + u8 op_buswidth = SPINAND_PROTO_BUSWIDTH(spinand->reg_proto); > + u8 op_is_dtr = SPINAND_PROTO_IS_DTR(spinand->reg_proto); > + > + if (spinand->reg_proto == SPINAND_SINGLE_STR) > + return; > + > + op->cmd.buswidth = op_buswidth; > + op->cmd.dtr = op_is_dtr; > + if (spinand->reg_proto == SPINAND_OCTAL_DTR) { > + op->cmd.opcode = (op->cmd.opcode << 8) | op->cmd.opcode; > + op->cmd.nbytes = 2; > + } > + > + if (op->addr.nbytes) { > + op->addr.buswidth = op_buswidth; > + op->addr.dtr = op_is_dtr; > + } > + > + if (op->dummy.nbytes) { > + op->dummy.buswidth = op_buswidth; > + op->dummy.dtr = op_is_dtr; > + op->dummy.nbytes <<= op_is_dtr; > + } > + > + if (op->data.nbytes) { > + op->data.buswidth = op_buswidth; > + op->data.dtr = op_is_dtr; > + } > +} > + > static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val) > { > struct spi_mem_op op = SPINAND_GET_FEATURE_OP(reg, > @@ -343,6 +386,7 @@ static int spinand_write_enable_op(struct spinand_device *spinand) > { > struct spi_mem_op op = SPINAND_WR_EN_DIS_OP(true); > > + spinand_patch_op(spinand, &op); > return spi_mem_exec_op(spinand->spimem, &op); > } > > @@ -353,6 +397,7 @@ static int spinand_load_page_op(struct spinand_device *spinand, > unsigned int row = nanddev_pos_to_row(nand, &req->pos); > struct spi_mem_op op = SPINAND_PAGE_READ_OP(row); > > + spinand_patch_op(spinand, &op); > return spi_mem_exec_op(spinand->spimem, &op); > } > > @@ -477,6 +522,7 @@ static int spinand_program_op(struct spinand_device *spinand, > unsigned int row = nanddev_pos_to_row(nand, &req->pos); > struct spi_mem_op op = SPINAND_PROG_EXEC_OP(row); > > + spinand_patch_op(spinand, &op); > return spi_mem_exec_op(spinand->spimem, &op); > } > > @@ -487,6 +533,7 @@ static int spinand_erase_op(struct spinand_device *spinand, > unsigned int row = nanddev_pos_to_row(nand, pos); > struct spi_mem_op op = SPINAND_BLK_ERASE_OP(row); > > + spinand_patch_op(spinand, &op); > return spi_mem_exec_op(spinand->spimem, &op); > } > > @@ -533,6 +580,7 @@ static int spinand_read_id_op(struct spinand_device *spinand, u8 naddr, > naddr, ndummy, spinand->scratchbuf, SPINAND_MAX_ID_LEN); > int ret; > > + spinand_patch_op(spinand, &op); > ret = spi_mem_exec_op(spinand->spimem, &op); > if (!ret) > memcpy(buf, spinand->scratchbuf, SPINAND_MAX_ID_LEN); > @@ -545,6 +593,7 @@ static int spinand_reset_op(struct spinand_device *spinand) > struct spi_mem_op op = SPINAND_RESET_OP; > int ret; > > + spinand_patch_op(spinand, &op); > ret = spi_mem_exec_op(spinand->spimem, &op); > if (ret) > return ret;
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c index d82a3e6d9bb5..11746d858f87 100644 --- a/drivers/mtd/nand/spi/core.c +++ b/drivers/mtd/nand/spi/core.c @@ -20,6 +20,49 @@ #include <linux/spi/spi.h> #include <linux/spi/spi-mem.h> +/** + * spinand_patch_op() - Helper function to patch the spi_mem op based on the + * spinand->reg_proto + * @spinand: the spinand device + * @op: the spi_mem op to patch + * + * Set up buswidth and dtr fields for cmd, addr, dummy and data phase. Also + * adjust cmd opcode and dummy nbytes. This function doesn't make any changes + * to addr val or data buf. + */ +static void spinand_patch_op(const struct spinand_device *spinand, + struct spi_mem_op *op) +{ + u8 op_buswidth = SPINAND_PROTO_BUSWIDTH(spinand->reg_proto); + u8 op_is_dtr = SPINAND_PROTO_IS_DTR(spinand->reg_proto); + + if (spinand->reg_proto == SPINAND_SINGLE_STR) + return; + + op->cmd.buswidth = op_buswidth; + op->cmd.dtr = op_is_dtr; + if (spinand->reg_proto == SPINAND_OCTAL_DTR) { + op->cmd.opcode = (op->cmd.opcode << 8) | op->cmd.opcode; + op->cmd.nbytes = 2; + } + + if (op->addr.nbytes) { + op->addr.buswidth = op_buswidth; + op->addr.dtr = op_is_dtr; + } + + if (op->dummy.nbytes) { + op->dummy.buswidth = op_buswidth; + op->dummy.dtr = op_is_dtr; + op->dummy.nbytes <<= op_is_dtr; + } + + if (op->data.nbytes) { + op->data.buswidth = op_buswidth; + op->data.dtr = op_is_dtr; + } +} + static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val) { struct spi_mem_op op = SPINAND_GET_FEATURE_OP(reg, @@ -343,6 +386,7 @@ static int spinand_write_enable_op(struct spinand_device *spinand) { struct spi_mem_op op = SPINAND_WR_EN_DIS_OP(true); + spinand_patch_op(spinand, &op); return spi_mem_exec_op(spinand->spimem, &op); } @@ -353,6 +397,7 @@ static int spinand_load_page_op(struct spinand_device *spinand, unsigned int row = nanddev_pos_to_row(nand, &req->pos); struct spi_mem_op op = SPINAND_PAGE_READ_OP(row); + spinand_patch_op(spinand, &op); return spi_mem_exec_op(spinand->spimem, &op); } @@ -477,6 +522,7 @@ static int spinand_program_op(struct spinand_device *spinand, unsigned int row = nanddev_pos_to_row(nand, &req->pos); struct spi_mem_op op = SPINAND_PROG_EXEC_OP(row); + spinand_patch_op(spinand, &op); return spi_mem_exec_op(spinand->spimem, &op); } @@ -487,6 +533,7 @@ static int spinand_erase_op(struct spinand_device *spinand, unsigned int row = nanddev_pos_to_row(nand, pos); struct spi_mem_op op = SPINAND_BLK_ERASE_OP(row); + spinand_patch_op(spinand, &op); return spi_mem_exec_op(spinand->spimem, &op); } @@ -533,6 +580,7 @@ static int spinand_read_id_op(struct spinand_device *spinand, u8 naddr, naddr, ndummy, spinand->scratchbuf, SPINAND_MAX_ID_LEN); int ret; + spinand_patch_op(spinand, &op); ret = spi_mem_exec_op(spinand->spimem, &op); if (!ret) memcpy(buf, spinand->scratchbuf, SPINAND_MAX_ID_LEN); @@ -545,6 +593,7 @@ static int spinand_reset_op(struct spinand_device *spinand) struct spi_mem_op op = SPINAND_RESET_OP; int ret; + spinand_patch_op(spinand, &op); ret = spi_mem_exec_op(spinand->spimem, &op); if (ret) return ret;
Currently, the op macros in spinand.h don't give the option to setup any non-array access instructions for Dual/Quad/Octal DTR SPI bus. Having a function that patches the op based on reg_proto would be better than trying to write all the setup logic in op macros. Create a spimem_patch_op() that would patch cmd, addr, dummy and data phase of the spi_mem op, for the given spinand->reg_proto. And hence, call the spimem_patch_op() before executing any spi_mem op. Note: In this commit, spimem_patch_op() isn't called in the read_reg_op(), write_reg_op() and wait() functions, as they need modifications in address value and data nbytes when in Octal DTR mode. This will be fixed in a later commit. Signed-off-by: Apurva Nandan <a-nandan@ti.com> --- drivers/mtd/nand/spi/core.c | 49 +++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+)