From patchwork Thu Nov 11 06:51:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Srikandan, Nandhini" X-Patchwork-Id: 12614287 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C8B2C433EF for ; Thu, 11 Nov 2021 06:54:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7DD306112F for ; Thu, 11 Nov 2021 06:54:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231444AbhKKG5R (ORCPT ); Thu, 11 Nov 2021 01:57:17 -0500 Received: from mga11.intel.com ([192.55.52.93]:34073 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230400AbhKKG5Q (ORCPT ); Thu, 11 Nov 2021 01:57:16 -0500 X-IronPort-AV: E=McAfee;i="6200,9189,10164"; a="230324727" X-IronPort-AV: E=Sophos;i="5.87,225,1631602800"; d="scan'208";a="230324727" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Nov 2021 22:54:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,225,1631602800"; d="scan'208";a="642864895" Received: from ubuntu18.png.intel.com ([10.88.229.69]) by fmsmga001.fm.intel.com with ESMTP; 10 Nov 2021 22:54:23 -0800 From: nandhini.srikandan@intel.com To: fancer.lancer@gmail.com, broonie@kernel.org, robh+dt@kernel.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org, mgross@linux.intel.com, kris.pan@intel.com, kenchappa.demakkanavar@intel.com, furong.zhou@intel.com, mallikarjunappa.sangannavar@intel.com, mahesh.r.vaidya@intel.com, nandhini.srikandan@intel.com, rashmi.a@intel.com Subject: [PATCH v3 1/5] dt-bindings: spi: Add SSTE support for DWC SSI controller Date: Thu, 11 Nov 2021 14:51:57 +0800 Message-Id: <20211111065201.10249-2-nandhini.srikandan@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211111065201.10249-1-nandhini.srikandan@intel.com> References: <20211111065201.10249-1-nandhini.srikandan@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org From: Nandhini Srikandan Add Slave Select Toggle Enable(SSTE) support for DWC SSI controller. Signed-off-by: Nandhini Srikandan --- Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml index ca91201a9926..866416d01e94 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml @@ -149,6 +149,12 @@ patternProperties: is an optional feature of the designware controller, and the upper limit is also subject to controller configuration. + snps,sste: + description: Slave select line will toggle between consecutive + data frames, with the serial clock being held to its default + value while slave select line is high. + type: boolean + unevaluatedProperties: false required: