| Message ID | 20220201115142.3999860-1-a.fatoum@pengutronix.de (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 5741150c808b2bbeb1017609f3029daf6651b7d5 |
| Headers | show |
| Series | [RFT] spi: stm32: ignore Rx queue not empty in stm32f4 Tx only mode | expand |
On Tue, 1 Feb 2022 12:51:41 +0100, Ahmad Fatoum wrote: > STM32F4_SPI_SR_RXNE and STM32F4_SPI_SR_OVR are distinct bits in the same > status register. ~STM32F4_SPI_SR_OVR | STM32F4_SPI_SR_RXNE is thus > equal to ~STM32F4_SPI_SR_OVR. > > The original intention was likely for transmission-only transfers to > ignore interrupts both for when the Rx queue has bytes (RXNE) as well > as when these bytes haven't been read in time (OVR). > > [...] Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next Thanks! [1/1] spi: stm32: ignore Rx queue not empty in stm32f4 Tx only mode commit: 5741150c808b2bbeb1017609f3029daf6651b7d5 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
diff --git a/drivers/spi/spi-stm32.c b/drivers/spi/spi-stm32.c index 9bd3fd1652f7..56062f88881d 100644 --- a/drivers/spi/spi-stm32.c +++ b/drivers/spi/spi-stm32.c @@ -763,7 +763,7 @@ static irqreturn_t stm32f4_spi_irq_event(int irq, void *dev_id) if (!spi->cur_usedma && (spi->cur_comm == SPI_SIMPLEX_TX || spi->cur_comm == SPI_3WIRE_TX)) { /* OVR flag shouldn't be handled for TX only mode */ - sr &= ~STM32F4_SPI_SR_OVR | STM32F4_SPI_SR_RXNE; + sr &= ~(STM32F4_SPI_SR_OVR | STM32F4_SPI_SR_RXNE); mask |= STM32F4_SPI_SR_TXE; }
STM32F4_SPI_SR_RXNE and STM32F4_SPI_SR_OVR are distinct bits in the same status register. ~STM32F4_SPI_SR_OVR | STM32F4_SPI_SR_RXNE is thus equal to ~STM32F4_SPI_SR_OVR. The original intention was likely for transmission-only transfers to ignore interrupts both for when the Rx queue has bytes (RXNE) as well as when these bytes haven't been read in time (OVR). Fix the typo by adding the missing parenthesis. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> --- Noticed reading driver code. Untested on actual Hardware. If you can test this, please do. --- drivers/spi/spi-stm32.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)