From patchwork Wed Feb 9 11:19:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leilk Liu X-Patchwork-Id: 12740196 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48419C433EF for ; Wed, 9 Feb 2022 12:08:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232466AbiBIMI3 (ORCPT ); Wed, 9 Feb 2022 07:08:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48060 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233087AbiBIMGg (ORCPT ); Wed, 9 Feb 2022 07:06:36 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 424DEC1DC733; Wed, 9 Feb 2022 03:19:48 -0800 (PST) X-UUID: c0cd2744d2ce427aae2a08eec454ab2c-20220209 X-UUID: c0cd2744d2ce427aae2a08eec454ab2c-20220209 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 581210229; Wed, 09 Feb 2022 19:19:44 +0800 Received: from mtkexhb02.mediatek.inc (172.21.101.103) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Wed, 9 Feb 2022 19:19:43 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb02.mediatek.inc (172.21.101.103) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 9 Feb 2022 19:19:43 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 9 Feb 2022 19:19:42 +0800 From: Leilk Liu To: Mark Brown CC: Rob Herring , Matthias Brugger , , , , , , Leilk Liu Subject: [PATCH 5/6] dt-bindings: spi: support mediatek,need_ahb_clk flag Date: Wed, 9 Feb 2022 19:19:37 +0800 Message-ID: <20220209111938.16137-6-leilk.liu@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220209111938.16137-1-leilk.liu@mediatek.com> References: <20220209111938.16137-1-leilk.liu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org this patch support mediatek,need_ahb_clk flag. Signed-off-by: Leilk Liu --- .../devicetree/bindings/spi/mediatek,spi-mt65xx.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml index 241c0f5880d3..af12c1711182 100644 --- a/Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml @@ -71,6 +71,11 @@ properties: specify which pins group(ck/mi/mo/cs) spi controller used. This is an array. + mediatek,need_ahb_clk: + $ref: /schemas/types.yaml#/definitions/flag + description: + specify IC which need control ahb clock. + required: - compatible - reg