Message ID | 20220317012006.15080-4-kyarlagadda@nvidia.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | spi: tegra quad: Add Tegra Grace features | expand |
On 3/17/22 03:20, Krishna Yarlagadda wrote: > Add flag to enable tpm wait state polling and Tegra Grace binding. > > Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> > --- > .../devicetree/bindings/spi/nvidia,tegra210-quad.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml > index 0296edd1de22..88b00fcad210 100644 > --- a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml > +++ b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml > @@ -20,6 +20,7 @@ properties: > - nvidia,tegra186-qspi > - nvidia,tegra194-qspi > - nvidia,tegra234-qspi > + - nvidia,tegra-grace-qspi nvidia,tegra241-qspi. Similarly in other places that refer to the chip name. Mikko > > reg: > maxItems: 1 > @@ -57,6 +58,11 @@ patternProperties: > spi-tx-bus-width: > enum: [1, 2, 4] > > + nvidia,wait-polling: > + description: > + Enable TPM wait state polling on supported chips. > + type: boolean > + > nvidia,tx-clk-tap-delay: > description: > Delays the clock going out to device with this tap value.
> -----Original Message----- > From: Mikko Perttunen <cyndis@kapsi.fi> > Sent: 17 March 2022 14:13 > To: Krishna Yarlagadda <kyarlagadda@nvidia.com>; broonie@kernel.org; thierry.reding@gmail.com; Jonathan Hunter > <jonathanh@nvidia.com>; linux-spi@vger.kernel.org; linux-tegra@vger.kernel.org; Ashish Singhal <ashishsingha@nvidia.com> > Cc: Sowjanya Komatineni <skomatineni@nvidia.com>; Laxman Dewangan <ldewangan@nvidia.com>; robh+dt@kernel.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org > Subject: Re: [PATCH 3/3] spi: dt-bindings: Add wait state polling flag > > External email: Use caution opening links or attachments > > > On 3/17/22 03:20, Krishna Yarlagadda wrote: > > Add flag to enable tpm wait state polling and Tegra Grace binding. > > > > Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> > > --- > > .../devicetree/bindings/spi/nvidia,tegra210-quad.yaml | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml > b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml > > index 0296edd1de22..88b00fcad210 100644 > > --- a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml > > +++ b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml > > @@ -20,6 +20,7 @@ properties: > > - nvidia,tegra186-qspi > > - nvidia,tegra194-qspi > > - nvidia,tegra234-qspi > > + - nvidia,tegra-grace-qspi > > nvidia,tegra241-qspi. Similarly in other places that refer to the chip name. Agree. Will change it to be consistent with rest of the chip patches. > > Mikko > > > > > reg: > > maxItems: 1 > > @@ -57,6 +58,11 @@ patternProperties: > > spi-tx-bus-width: > > enum: [1, 2, 4] > > > > + nvidia,wait-polling: > > + description: > > + Enable TPM wait state polling on supported chips. > > + type: boolean > > + > > nvidia,tx-clk-tap-delay: > > description: > > Delays the clock going out to device with this tap value.
On Thu, Mar 17, 2022 at 06:50:06AM +0530, Krishna Yarlagadda wrote: > Add flag to enable tpm wait state polling and Tegra Grace binding. TPM > > Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> > --- > .../devicetree/bindings/spi/nvidia,tegra210-quad.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml > index 0296edd1de22..88b00fcad210 100644 > --- a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml > +++ b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml > @@ -20,6 +20,7 @@ properties: > - nvidia,tegra186-qspi > - nvidia,tegra194-qspi > - nvidia,tegra234-qspi > + - nvidia,tegra-grace-qspi > > reg: > maxItems: 1 > @@ -57,6 +58,11 @@ patternProperties: > spi-tx-bus-width: > enum: [1, 2, 4] > > + nvidia,wait-polling: > + description: > + Enable TPM wait state polling on supported chips. What's TPM? Why is this not implied by the compatible string? Also, how child node properties are handled has changed. See Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml. The NVidia specific properties should be refactored first before adding more. > + type: boolean > + > nvidia,tx-clk-tap-delay: > description: > Delays the clock going out to device with this tap value. > -- > 2.17.1 > >
diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml index 0296edd1de22..88b00fcad210 100644 --- a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml +++ b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml @@ -20,6 +20,7 @@ properties: - nvidia,tegra186-qspi - nvidia,tegra194-qspi - nvidia,tegra234-qspi + - nvidia,tegra-grace-qspi reg: maxItems: 1 @@ -57,6 +58,11 @@ patternProperties: spi-tx-bus-width: enum: [1, 2, 4] + nvidia,wait-polling: + description: + Enable TPM wait state polling on supported chips. + type: boolean + nvidia,tx-clk-tap-delay: description: Delays the clock going out to device with this tap value.
Add flag to enable tpm wait state polling and Tegra Grace binding. Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> --- .../devicetree/bindings/spi/nvidia,tegra210-quad.yaml | 6 ++++++ 1 file changed, 6 insertions(+)