| Message ID | 20220406233648.21644-4-brad@pensando.io (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Support Pensando Elba SoC | expand |
On Thu, Apr 7, 2022 at 1:36 AM Brad Larson <brad@pensando.io> wrote: > > Pensando Elba ARM 64-bit SoC is integrated with this IP and > explicitly controls byte-lane enables resulting in an additional > reg property resource. > > Signed-off-by: Brad Larson <brad@pensando.io> > --- > Change from V3: > - Change from elba-emmc to elba-sd4hc to match file convention > - Use minItems: 1 and maxItems: 2 to pass schema check > > Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > index 4207fed62dfe..278a71b27488 100644 > --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > @@ -19,10 +19,12 @@ properties: > - enum: > - microchip,mpfs-sd4hc > - socionext,uniphier-sd4hc > + - pensando,elba-sd4hc > - const: cdns,sd4hc > > reg: > - maxItems: 1 > + minItems: 1 > + maxItems: 2 > Shouldn't the binding describe what the register areas are? If there is only one of them, it is fairly clear, but when you have the choice between one and two, it gets ambiguous, and there is a risk that another SoC might have a different register area in the second entry, making it incompatible. Arnd
On 07/04/2022 01:36, Brad Larson wrote: > Pensando Elba ARM 64-bit SoC is integrated with this IP and > explicitly controls byte-lane enables resulting in an additional > reg property resource. > > Signed-off-by: Brad Larson <brad@pensando.io> > --- > Change from V3: > - Change from elba-emmc to elba-sd4hc to match file convention > - Use minItems: 1 and maxItems: 2 to pass schema check > > Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > index 4207fed62dfe..278a71b27488 100644 > --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > @@ -19,10 +19,12 @@ properties: > - enum: > - microchip,mpfs-sd4hc > - socionext,uniphier-sd4hc > + - pensando,elba-sd4hc Put your entry in alphabetical order. > - const: cdns,sd4hc > > reg: > - maxItems: 1 > + minItems: 1 > + maxItems: 2 This needs allOf:if:then: which sets constraint on number of items per different compatible. > > interrupts: > maxItems: 1 Best regards, Krzysztof
Hi Arnd, On Wed, Apr 6, 2022 at 11:31 PM Arnd Bergmann <arnd@arndb.de> wrote: > > On Thu, Apr 7, 2022 at 1:36 AM Brad Larson <brad@pensando.io> wrote: > > > > --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > > +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > > @@ -19,10 +19,12 @@ properties: > > - enum: > > - microchip,mpfs-sd4hc > > - socionext,uniphier-sd4hc > > + - pensando,elba-sd4hc > > - const: cdns,sd4hc > > > > reg: > > - maxItems: 1 > > + minItems: 1 > > + maxItems: 2 > > > > Shouldn't the binding describe what the register areas are? If there > is only one of them, it is fairly clear, but when you have the choice > between one and two, it gets ambiguous, and there is a risk that > another SoC might have a different register area in the second entry, > making it incompatible. Thanks for the review. Changing this to allOf:if:then in updated patchset. The second item is particular to Elba SoC. Regards, Brad
Hi Krzysztof, On Thu, Apr 7, 2022 at 11:57 AM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 07/04/2022 01:36, Brad Larson wrote: > > > > --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > > +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml > > @@ -19,10 +19,12 @@ properties: > > - enum: > > - microchip,mpfs-sd4hc > > - socionext,uniphier-sd4hc > > + - pensando,elba-sd4hc > > Put your entry in alphabetical order. Yes, will order alphabetical. > > - const: cdns,sd4hc > > > > reg: > > - maxItems: 1 > > + minItems: 1 > > + maxItems: 2 > > This needs allOf:if:then: which sets constraint on number of items per > different compatible. > > > > > interrupts: > > maxItems: 1 Thanks for the recommendation. Changing to this approach as the second item is only for Elba SoC. Regards, Brad
diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml index 4207fed62dfe..278a71b27488 100644 --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml @@ -19,10 +19,12 @@ properties: - enum: - microchip,mpfs-sd4hc - socionext,uniphier-sd4hc + - pensando,elba-sd4hc - const: cdns,sd4hc reg: - maxItems: 1 + minItems: 1 + maxItems: 2 interrupts: maxItems: 1
Pensando Elba ARM 64-bit SoC is integrated with this IP and explicitly controls byte-lane enables resulting in an additional reg property resource. Signed-off-by: Brad Larson <brad@pensando.io> --- Change from V3: - Change from elba-emmc to elba-sd4hc to match file convention - Use minItems: 1 and maxItems: 2 to pass schema check Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)