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[11/11] spi: dw: initialize dwc-ssi-1.03a controller

Message ID 20220802175755.6530-12-sudip.mukherjee@sifive.com (mailing list archive)
State New, archived
Headers show
Series Add support for enhanced SPI for Designware SPI controllers | expand

Commit Message

Sudip Mukherjee Aug. 2, 2022, 5:57 p.m. UTC
Define the initialization of dwc-ssi-1.03a controller and mark it with
the capability of enhanced SPI supporting dual/quad/octal modes of
transfer.

Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com>
---
 drivers/spi/spi-dw-mmio.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Serge Semin Aug. 26, 2022, 11:31 p.m. UTC | #1
On Tue, Aug 02, 2022 at 06:57:55PM +0100, Sudip Mukherjee wrote:
> Define the initialization of dwc-ssi-1.03a controller and mark it with
> the capability of enhanced SPI supporting dual/quad/octal modes of
> transfer.
> 
> Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com>
> ---
>  drivers/spi/spi-dw-mmio.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
> index 26c40ea6dd12..db80e0645172 100644
> --- a/drivers/spi/spi-dw-mmio.c
> +++ b/drivers/spi/spi-dw-mmio.c
> @@ -237,6 +237,15 @@ static int dw_spi_canaan_k210_init(struct platform_device *pdev,
>  	return 0;
>  }
>  
> +static int dw_spi_hssi_ext_init(struct platform_device *pdev,
> +				struct dw_spi_mmio *dwsmmio)
> +{
> +	dwsmmio->dws.ip = DW_HSSI_ID;

> +	dwsmmio->dws.caps = DW_SPI_CAP_EXT_SPI;

The eSPI capability shall be auto-detectable by checking whether the
CTRLR0.SPI_FRF field is writable. If it is then you'll need to check
whether the clock stretching is also available by setting to the
SPI_CTRLR0.CLK_STRETCH_EN flag. After that you can set the capability
flag.

Since the auto-detection procedure is available you won't need the
dw_spi_hssi_ext_init() method here. So just drop it and use
dw_spi_hssi_init() for the platform-specific initialization. Note it
will also check the DMA-capability for you.

> +
> +	return 0;
> +}
> +
>  static int dw_spi_mmio_probe(struct platform_device *pdev)
>  {
>  	int (*init_func)(struct platform_device *pdev,
> @@ -352,6 +361,7 @@ static const struct of_device_id dw_spi_mmio_of_match[] = {
>  	{ .compatible = "intel,thunderbay-ssi", .data = dw_spi_intel_init},
>  	{ .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init},
>  	{ .compatible = "canaan,k210-spi", dw_spi_canaan_k210_init},

> +	{ .compatible = "snps,dwc-ssi-1.03a", dw_spi_hssi_ext_init},

Add "snps,dw-ahb-ssi" with the generic dw_spi_hssi_init() init method.

-Sergey

>  	{ /* end of table */}
>  };
>  MODULE_DEVICE_TABLE(of, dw_spi_mmio_of_match);
> -- 
> 2.30.2
>
diff mbox series

Patch

diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
index 26c40ea6dd12..db80e0645172 100644
--- a/drivers/spi/spi-dw-mmio.c
+++ b/drivers/spi/spi-dw-mmio.c
@@ -237,6 +237,15 @@  static int dw_spi_canaan_k210_init(struct platform_device *pdev,
 	return 0;
 }
 
+static int dw_spi_hssi_ext_init(struct platform_device *pdev,
+				struct dw_spi_mmio *dwsmmio)
+{
+	dwsmmio->dws.ip = DW_HSSI_ID;
+	dwsmmio->dws.caps = DW_SPI_CAP_EXT_SPI;
+
+	return 0;
+}
+
 static int dw_spi_mmio_probe(struct platform_device *pdev)
 {
 	int (*init_func)(struct platform_device *pdev,
@@ -352,6 +361,7 @@  static const struct of_device_id dw_spi_mmio_of_match[] = {
 	{ .compatible = "intel,thunderbay-ssi", .data = dw_spi_intel_init},
 	{ .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init},
 	{ .compatible = "canaan,k210-spi", dw_spi_canaan_k210_init},
+	{ .compatible = "snps,dwc-ssi-1.03a", dw_spi_hssi_ext_init},
 	{ /* end of table */}
 };
 MODULE_DEVICE_TABLE(of, dw_spi_mmio_of_match);