From patchwork Tue Sep 13 14:22:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergiu Moga X-Patchwork-Id: 12974994 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7E02C54EE9 for ; Tue, 13 Sep 2022 16:55:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231726AbiIMQzD (ORCPT ); Tue, 13 Sep 2022 12:55:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45594 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231775AbiIMQyc (ORCPT ); Tue, 13 Sep 2022 12:54:32 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A1E02C0B68; Tue, 13 Sep 2022 08:47:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1663084045; x=1694620045; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=z/YKByiaIlpU8pE5yj2eqLLdZWkiyu84ffoyl6Fiz44=; b=exGiSpZySfkoQtAtkzzY4CiEVQiBrKqCuFjT80ZR4ZHFit+nAKfZTSV2 IsI6MM/IWzzsP8mmE/SWNCu1atpAU7PENP/hM2lc1E7Gv7KXw0Jj9xEBC 5/1ToN5sxUtawyR4jEs3z34Th/TDkg95i+QzBxBKKwlEV2Ao3dITM12IH 9oGyZK2Kbs7AWeG5k1rC32ZKqfMrBqtwN8mnOpypLmNE63Aav8jyr2pwV wRYU5Zm01qpoTxGDEXcziLYcyz/tuSq4IFHdKhtWUUhTjby1Bguj3o3d9 BwJLnsEFhgIeuDQvJ5A6tKhEYqupeJmEYb44JnX+tFSn0yEw+5EbTON4d Q==; X-IronPort-AV: E=Sophos;i="5.93,313,1654585200"; d="scan'208";a="176926450" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 13 Sep 2022 07:25:47 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Tue, 13 Sep 2022 07:25:43 -0700 Received: from ROB-ULT-M68701.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Tue, 13 Sep 2022 07:25:38 -0700 From: Sergiu Moga To: , , , , , , , , , , , , , , , , CC: , , , , , Subject: [PATCH v3 11/14] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register Date: Tue, 13 Sep 2022 17:22:03 +0300 Message-ID: <20220913142205.162399-12-sergiu.moga@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220913142205.162399-1-sergiu.moga@microchip.com> References: <20220913142205.162399-1-sergiu.moga@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Add definitions for the Baud Rate Source Clock bitmask of the Mode Register of UART IP's and its bitfields. Signed-off-by: Sergiu Moga --- v1 -> v2: - Nothing, this patch was not here before v2 -> v3: - Previously this was [PATCH 11] drivers/tty/serial/atmel_serial.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h index 70d0611e56fd..ed64035ba6c3 100644 --- a/drivers/tty/serial/atmel_serial.h +++ b/drivers/tty/serial/atmel_serial.h @@ -68,6 +68,9 @@ #define ATMEL_US_NBSTOP_1 (0 << 12) #define ATMEL_US_NBSTOP_1_5 (1 << 12) #define ATMEL_US_NBSTOP_2 (2 << 12) +#define ATMEL_UA_BRSRCCK GENMASK(13, 12) /* Clock Selection for UART */ +#define ATMEL_UA_BRSRCCK_PERIPH_CLK (0 << 12) +#define ATMEL_UA_BRSRCCK_GCLK (1 << 12) #define ATMEL_US_CHMODE GENMASK(15, 14) /* Channel Mode */ #define ATMEL_US_CHMODE_NORMAL (0 << 14) #define ATMEL_US_CHMODE_ECHO (1 << 14)