From patchwork Thu Sep 22 10:04:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bert Vermeulen X-Patchwork-Id: 12984941 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 504C2C6FA8B for ; Thu, 22 Sep 2022 10:30:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229621AbiIVKap (ORCPT ); Thu, 22 Sep 2022 06:30:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55242 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230195AbiIVKao (ORCPT ); Thu, 22 Sep 2022 06:30:44 -0400 Received: from yawp.biot.com (yawp.biot.com [IPv6:2a01:4f8:10a:8e::fce2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 96840D0784 for ; Thu, 22 Sep 2022 03:30:43 -0700 (PDT) Received: from debian-spamd by yawp.biot.com with sa-checked (Exim 4.93) (envelope-from ) id 1obJ4J-00Bx1a-QE for linux-spi@vger.kernel.org; Thu, 22 Sep 2022 12:04:31 +0200 Received: from [2a02:578:460c:1:ae1f:6bff:fed1:9ca8] (helo=sumner.biot.com) by yawp.biot.com with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1obJ4J-00Bx1W-NE; Thu, 22 Sep 2022 12:04:31 +0200 Received: from bert by sumner.biot.com with local (Exim 4.93) (envelope-from ) id 1obJ4J-004cfU-4x; Thu, 22 Sep 2022 12:04:31 +0200 From: Bert Vermeulen To: linux-spi@vger.kernel.org, devicetree@vger.kernel.org Cc: Bert Vermeulen , John Crispin , Benjamin Larsson Subject: [PATCH 3/3] ARM: dts: en7523: Add SPI node Date: Thu, 22 Sep 2022 12:04:10 +0200 Message-Id: <20220922100410.1101874-4-bert@biot.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220922100410.1101874-1-bert@biot.com> References: <20220922100410.1101874-1-bert@biot.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org This adds an SPI node for the EN7523, so far only used for hooking up the NAND boot flash. Signed-off-by: Bert Vermeulen --- arch/arm/boot/dts/en7523-evb.dts | 20 ++++++++++++++++++++ arch/arm/boot/dts/en7523.dtsi | 11 +++++++++++ 2 files changed, 31 insertions(+) diff --git a/arch/arm/boot/dts/en7523-evb.dts b/arch/arm/boot/dts/en7523-evb.dts index f23a25cce119..50ccd58b1672 100644 --- a/arch/arm/boot/dts/en7523-evb.dts +++ b/arch/arm/boot/dts/en7523-evb.dts @@ -26,6 +26,26 @@ memory@80000000 { }; }; +&spi0 { + nand: nand@0 { + compatible = "spi-nand"; + reg = <0>; + nand-ecc-engine = <&nand>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x80000>; + read-only; + }; + }; + }; +}; + &gpio0 { status = "okay"; }; diff --git a/arch/arm/boot/dts/en7523.dtsi b/arch/arm/boot/dts/en7523.dtsi index 7f839331a777..2a61447f7b5c 100644 --- a/arch/arm/boot/dts/en7523.dtsi +++ b/arch/arm/boot/dts/en7523.dtsi @@ -201,4 +201,15 @@ pcie_intc1: interrupt-controller { #interrupt-cells = <1>; }; }; + + spi0: spi@1fa10000 { + compatible = "airoha,en7523-spi"; + reg = <0x1fa10000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&scu EN7523_CLK_SPI>; + clock-names = "spi"; + spi-rx-bus-width = <2>; + spi-tx-bus-width = <2>; + }; };