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Tue, 11 Oct 2022 01:20:57 -0500 Received: from xhdlakshmis40.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.28 via Frontend Transport; Tue, 11 Oct 2022 01:20:54 -0500 From: Amit Kumar Mahapatra To: , , CC: , , , , , , Rajan Vaja , "Amit Kumar Mahapatra" Subject: [PATCH v4 4/7] firmware: xilinx: Add qspi firmware interface Date: Tue, 11 Oct 2022 11:50:37 +0530 Message-ID: <20221011062040.12116-5-amit.kumar-mahapatra@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221011062040.12116-1-amit.kumar-mahapatra@amd.com> References: <20221011062040.12116-1-amit.kumar-mahapatra@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT004:EE_|MN0PR12MB6125:EE_ X-MS-Office365-Filtering-Correlation-Id: bae8acac-95ca-499a-e0c5-08daab50c4a3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: M0UaVTOv2gxwu710w0aYpFeGQyNxPWupR4H8IeobZFXosBAxJ++Q0BT83wyLaFynyfGVoccYG0m5yaq3XC5FRSPz1tou8VDrmtT7o/L7T25hH8kVVaIbFfniFknpJzLqa4Vq3dtczi8q1jPiv0+579zdOC4p/2COxvAQliXbyHUuwrq2Hw55RrenMiun4eqnQC9kK3aYSKAfZxlyQzc9FD/R6tjUymF6SPHAYgCaJnZEl0IuwZkYh6cDIow+wnzAm4kvuy0AbRxcWhILbb46k3usB3N/JrdyLylVUNDqijIwhya+H4VV9kMzFtRjLNYVeTwyW4HjlC7zO0BymasYujwt9konc1a5Sf1yxS1xbuMeHVLZnEn4yehU/REPkhvEptX9VuVOOuxqY2LzjTSZJyZ8tfG7uyi4qInW7MPBxOKR+ILO8Xo4pCptVB4p2U/jx2Q6VHK8cCpZICYr7U09lzufC5dxz7Bja3IMKdngI7IGgFKJggznvdEyQwH7L/N/gmCQIEipW7QfHlpQ8490ZGzvL4O7i5UeGJe8vtXQ4dfBEqZcZOftcepUPGm6Ds9m08LbD3jDtgLXzQivltYVE9ZXnv5lf/1vVK5VOxp28MiXh2yGMqmyTq0z9qdTaJ9ucuw6MAp4MOJBdVYxkT1j1IX82LKMvpkyI0X1OObPKKrhP62AoaIP8HnONEQWkcwhap6PgtGJt3scS6mTDI+iY683vtdN58lCjETwqnYFqnIVF3yYEWkM3T7Y2Y5jv3sOJNaxh0AKdHmHy/qYuxKobqeAdlm6M5GWlscMykbpq+f8bUaLsS91xZLIqkqtE3sb X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(136003)(376002)(396003)(346002)(451199015)(36840700001)(46966006)(40470700004)(82740400003)(81166007)(356005)(36756003)(86362001)(2906002)(5660300002)(83380400001)(186003)(47076005)(426003)(40480700001)(336012)(2616005)(1076003)(36860700001)(26005)(6666004)(4326008)(8676002)(70586007)(70206006)(54906003)(110136005)(41300700001)(40460700003)(82310400005)(316002)(8936002)(478600001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Oct 2022 06:21:01.0841 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bae8acac-95ca-499a-e0c5-08daab50c4a3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT004.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6125 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org From: Rajan Vaja Add support for QSPI ioctl functions and enums. Signed-off-by: Rajan Vaja Signed-off-by: Michal Simek Signed-off-by: Amit Kumar Mahapatra --- drivers/firmware/xilinx/zynqmp.c | 7 +++++++ include/linux/firmware/xlnx-zynqmp.h | 19 +++++++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index d1f652802181..5d709faf9fe2 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -843,6 +843,13 @@ int zynqmp_pm_read_pggs(u32 index, u32 *value) } EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs); +int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_TAPDELAY_BYPASS, + index, value, NULL); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass); + /** * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status * @value: Status value to be written diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 9f50dacbf7d6..0a84b04af26e 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -135,6 +135,7 @@ enum pm_ret_status { }; enum pm_ioctl_id { + IOCTL_SET_TAPDELAY_BYPASS = 4, IOCTL_SD_DLL_RESET = 6, IOCTL_SET_SD_TAPDELAY = 7, IOCTL_SET_PLL_FRAC_MODE = 8, @@ -386,6 +387,18 @@ enum zynqmp_pm_shutdown_subtype { ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM = 2, }; +enum tap_delay_signal_type { + PM_TAPDELAY_NAND_DQS_IN = 0, + PM_TAPDELAY_NAND_DQS_OUT = 1, + PM_TAPDELAY_QSPI = 2, + PM_TAPDELAY_MAX = 3, +}; + +enum tap_delay_bypass_ctrl { + PM_TAPDELAY_BYPASS_DISABLE = 0, + PM_TAPDELAY_BYPASS_ENABLE = 1, +}; + enum ospi_mux_select_type { PM_OSPI_MUX_SEL_DMA = 0, PM_OSPI_MUX_SEL_LINEAR = 1, @@ -457,6 +470,7 @@ int zynqmp_pm_write_ggs(u32 index, u32 value); int zynqmp_pm_read_ggs(u32 index, u32 *value); int zynqmp_pm_write_pggs(u32 index, u32 value); int zynqmp_pm_read_pggs(u32 index, u32 *value); +int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value); int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype); int zynqmp_pm_set_boot_health_status(u32 value); int zynqmp_pm_pinctrl_request(const u32 pin); @@ -666,6 +680,11 @@ static inline int zynqmp_pm_read_pggs(u32 index, u32 *value) return -ENODEV; } +static inline int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value) +{ + return -ENODEV; +} + static inline int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype) { return -ENODEV;