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([186.122.181.28]) by smtp.gmail.com with ESMTPSA id u3-20020a056870d58300b0011f00b027bdsm9154325oao.45.2022.10.20.09.45.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Oct 2022 09:45:35 -0700 (PDT) From: Mauro Lima To: broonie@kernel.org Cc: mika.westerberg@linux.intel.com, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Mauro Lima Subject: [PATCH 2/2] spi: intel-spi: build the driver with hardware sequencing by default Date: Thu, 20 Oct 2022 13:45:08 -0300 Message-Id: <20221020164508.29182-3-mauro.lima@eclypsium.com> X-Mailer: git-send-email 2.34.3 In-Reply-To: <20221020164508.29182-1-mauro.lima@eclypsium.com> References: <20221020164508.29182-1-mauro.lima@eclypsium.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Add menuconfig option to build the driver with hardware sequencing by default and another to specify software sequencing support if needed. For the software sequencing functionality preserve the *DANGEROUS* tag. Signed-off-by: Mauro Lima --- drivers/spi/Kconfig | 15 +++++++++-- drivers/spi/spi-intel-swseq.c | 50 +++++++++++++++++++++++++++++++++++ 2 files changed, 63 insertions(+), 2 deletions(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index d1bb62f7368b..aec095988ab7 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -448,7 +448,7 @@ config SPI_INTEL tristate config SPI_INTEL_PCI - tristate "Intel PCH/PCU SPI flash PCI driver (DANGEROUS)" + tristate "Intel PCH/PCU SPI flash PCI driver" depends on PCI depends on X86 || COMPILE_TEST depends on SPI_MEM @@ -458,6 +458,8 @@ config SPI_INTEL_PCI master mode. This controller is present in modern Intel hardware and is used to hold BIOS and other persistent settings. Using this driver it is possible to upgrade BIOS directly from Linux. + The driver will use hardware sequencing capabilities from the chip + by default. Say N here unless you know what you are doing. Overwriting the SPI flash may render the system unbootable. @@ -466,7 +468,7 @@ config SPI_INTEL_PCI will be called spi-intel-pci. config SPI_INTEL_PLATFORM - tristate "Intel PCH/PCU SPI flash platform driver (DANGEROUS)" + tristate "Intel PCH/PCU SPI flash platform driver" depends on X86 || COMPILE_TEST depends on SPI_MEM select SPI_INTEL @@ -476,6 +478,8 @@ config SPI_INTEL_PLATFORM Intel hardware and is used to hold BIOS and other persistent settings. Using this driver it is possible to upgrade BIOS directly from Linux. + The driver will use hardware sequencing capabilities from the chip + by default. Say N here unless you know what you are doing. Overwriting the SPI flash may render the system unbootable. @@ -483,6 +487,13 @@ config SPI_INTEL_PLATFORM To compile this driver as a module, choose M here: the module will be called spi-intel-platform. +config SPI_INTEL_SWSEQ + tristate "Intel SPI controller software sequencing support (DANGEROUS)" + depends on X86 || COMPILE_TEST + depends on SPI_MEM + help + This enables software sequencing functionality to the SPI controller + config SPI_JCORE tristate "J-Core SPI Master" depends on OF && (SUPERH || COMPILE_TEST) diff --git a/drivers/spi/spi-intel-swseq.c b/drivers/spi/spi-intel-swseq.c index 2597aa06a160..d7e4834be6db 100644 --- a/drivers/spi/spi-intel-swseq.c +++ b/drivers/spi/spi-intel-swseq.c @@ -12,6 +12,7 @@ #include "spi-intel-common.h" #include "spi-intel-swseq.h" +#if defined(CONFIG_SPI_INTEL_SWSEQ) bool mem_op_supported_on_spi_locked(const struct intel_spi *ispi, const struct spi_mem_op *op) { @@ -178,4 +179,53 @@ void populate_opmenus(struct intel_spi *ispi, u32 *opmenu0, u32 *opmenu1) } EXPORT_SYMBOL(populate_opmenus); +#else +static inline void log_error_swseq_not_supported(const struct intel_spi *ispi) +{ + dev_err(ispi->dev, "SW sequencing is not enabled"); +} + +int handle_swseq_wren(struct intel_spi *ispi) +{ + log_error_swseq_not_supported(ispi); + return -EINVAL; +} +EXPORT_SYMBOL(handle_swseq_wren); + +bool mem_op_supported_on_spi_locked(const struct intel_spi *ispi, + const struct spi_mem_op *op) +{ + log_error_swseq_not_supported(ispi); + return false; +} +EXPORT_SYMBOL(mem_op_supported_on_spi_locked); + +int intel_spi_sw_cycle(struct intel_spi *ispi, u8 opcode, size_t len, + int optype) +{ + log_error_swseq_not_supported(ispi); + return -ENOTSUPP; +} +EXPORT_SYMBOL(intel_spi_sw_cycle); + +inline bool is_swseq_enabled(void) +{ + return false; +} +EXPORT_SYMBOL(is_swseq_enabled); + +void disable_smi_generation(const struct intel_spi *ispi) +{ + log_error_swseq_not_supported(ispi); +} +EXPORT_SYMBOL(disable_smi_generation); + +void populate_opmenus(struct intel_spi *ispi, u32 *opmenu0, u32 *opmenu1) +{ + log_error_swseq_not_supported(ispi); +} +EXPORT_SYMBOL(populate_opmenus); + +#endif + MODULE_LICENSE("GPL v2");