From patchwork Fri Dec 2 09:48:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Edmund Berenson X-Patchwork-Id: 13062529 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F1A4C4332F for ; Fri, 2 Dec 2022 09:57:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232734AbiLBJ5M (ORCPT ); Fri, 2 Dec 2022 04:57:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60814 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232214AbiLBJ5L (ORCPT ); Fri, 2 Dec 2022 04:57:11 -0500 Received: from mx1.emlix.com (mx1.emlix.com [136.243.223.33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 53C64CB20C for ; Fri, 2 Dec 2022 01:57:11 -0800 (PST) Received: from mailer.emlix.com (p5098be52.dip0.t-ipconnect.de [80.152.190.82]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.emlix.com (Postfix) with ESMTPS id C25FD5FCDC; Fri, 2 Dec 2022 10:49:20 +0100 (CET) From: Edmund Berenson Cc: Edmund Berenson , Lukasz Zemla , Serge Semin , Mark Brown , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] spi: dw: select SS0 when gpio cs is used Date: Fri, 2 Dec 2022 10:48:59 +0100 Message-Id: <20221202094859.7869-1-edmund.berenson@emlix.com> X-Mailer: git-send-email 2.37.4 MIME-Version: 1.0 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org SER register contains only 4-bit bit-field for enabling 4 SPI chip selects. If gpio cs are used the cs number may be >= 4. To ensure we do not write outside of the valid area, we choose SS0 in case of gpio cs to start spi transfer. Co-developed-by: Lukasz Zemla Signed-off-by: Lukasz Zemla Signed-off-by: Edmund Berenson --- drivers/spi/spi-dw-core.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 99edddf9958b..57c9e384d6d4 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -94,6 +94,10 @@ void dw_spi_set_cs(struct spi_device *spi, bool enable) { struct dw_spi *dws = spi_controller_get_devdata(spi->controller); bool cs_high = !!(spi->mode & SPI_CS_HIGH); + u8 enable_cs = 0; + + if (!spi->cs_gpiod) + enable_cs = spi->chip_select; /* * DW SPI controller demands any native CS being set in order to @@ -103,7 +107,7 @@ void dw_spi_set_cs(struct spi_device *spi, bool enable) * support active-high or active-low CS level. */ if (cs_high == enable) - dw_writel(dws, DW_SPI_SER, BIT(spi->chip_select)); + dw_writel(dws, DW_SPI_SER, BIT(enable_cs)); else dw_writel(dws, DW_SPI_SER, 0); }