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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2023 16:18:14.1043 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 811f0115-d7d4-4e13-a488-08db053915ee X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT045.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5858 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Tegra234 and Tegra241 devices have QSPI controller that supports TPM devices. Since the controller only supports half duplex, sw wait polling method implemented in tpm_tis_spi does not suffice. Wait polling as per protocol is a hardware feature. Add compatible for Tegra TPM driver with hardware flow control. Signed-off-by: Krishna Yarlagadda --- .../bindings/security/tpm/nvidia,tegra-tpm-spi.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 Documentation/devicetree/bindings/security/tpm/nvidia,tegra-tpm-spi.txt diff --git a/Documentation/devicetree/bindings/security/tpm/nvidia,tegra-tpm-spi.txt b/Documentation/devicetree/bindings/security/tpm/nvidia,tegra-tpm-spi.txt new file mode 100644 index 000000000000..a2017945c7c0 --- /dev/null +++ b/Documentation/devicetree/bindings/security/tpm/nvidia,tegra-tpm-spi.txt @@ -0,0 +1,14 @@ +* Device Tree Bindings for TPM device connected to TEGRA QSPI controller + +Required Properties: + +- compatible: Should be "nvidia,tegra-tpm-spi". + +Example: + +&qspi0 { + tpm@0 { + compatible = "nvidia,tegra-tpm-spi"; + reg = <0>; + }; +};