[1/2] spi: spi-nxp-fspi: correct the comment for the DLL config

Commit Message

Bough Chen March 22, 2023, 9:04 a.m. UTC

From: Haibo Chen <[e-mail]>

Current DLL config is just to use the default setting, this means
enable the DLL override mode, and use 1 fixed delay cell in the
DLL delay chain, not means "reset" the DLL, so correct this to
avoid confuse.

Signed-off-by: Haibo Chen <[e-mail]>
---
 drivers/spi/spi-nxp-fspi.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

Comments

Mark Brown March 22, 2023, 6:47 p.m. UTC | #1

On Wed, 22 Mar 2023 17:04:50 +0800, [e-mail] wrote:
> Current DLL config is just to use the default setting, this means
> enable the DLL override mode, and use 1 fixed delay cell in the
> DLL delay chain, not means "reset" the DLL, so correct this to
> avoid confuse.
> 
> 

Applied to

   broonie/spi.git for-next

Thanks!

[1/2] spi: spi-nxp-fspi: correct the comment for the DLL config
      commit: 1ab09f1d070c4774175dab95e55d2b72c2a054ab
[2/2] spi: spi-nxp-fspi: use DLL calibration when clock rate > 100MHz
      commit: 99d822b3adc4f9af59cefdc6619cb3f64182efed

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

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Thanks,
Mark

Patch

diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c
index 76168cc1e00d..6735c22b9137 100644
--- a/drivers/spi/spi-nxp-fspi.c
+++ b/drivers/spi/spi-nxp-fspi.c
@@ -997,7 +997,11 @@  static int nxp_fspi_default_setup(struct nxp_fspi *f)
 	/* Disable the module */
 	fspi_writel(f, FSPI_MCR0_MDIS, base + FSPI_MCR0);
 
-	/* Reset the DLL register to default value */
+	/*
+	 * Config the DLL register to default value, enable the slave clock delay
+	 * line delay cell override mode, and use 1 fixed delay cell in DLL delay
+	 * chain, this is the suggested setting when clock rate < 100MHz.
+	 */
 	fspi_writel(f, FSPI_DLLACR_OVRDEN, base + FSPI_DLLACR);
 	fspi_writel(f, FSPI_DLLBCR_OVRDEN, base + FSPI_DLLBCR);