| Message ID | 20231213091346.956789-2-haibo.chen@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/5] spi: spi-nxp-fspi: enable runtime pm for fspi | expand |
> The fspi dynamic lut use the last lut for all IPS operations, the > imx8ulp only supports 15 luts, so change the last lut index from It's 16 LUTs, no? There's also index 0. > 31 to 15. > > Signed-off-by: Han Xu <han.xu@nxp.com> > Signed-off-by: Haibo Chen <haibo.chen@nxp.com> > --- > drivers/spi/spi-nxp-fspi.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c > index 0feecf5ba010..9d6b4d22263c 100644 > --- a/drivers/spi/spi-nxp-fspi.c > +++ b/drivers/spi/spi-nxp-fspi.c > @@ -64,9 +64,9 @@ > /* > * The driver only uses one single LUT entry, that is updated on > * each call of exec_op(). Index 0 is preset at boot with a basic > - * read operation, so let's use the last entry (31). > + * read operation, so let's use the last entry (15). Please add the information about the imx8mulp to the comment. Otherwise, the comment will be confusing for SoCs where there are 32 LUTs. -michael > */ > -#define SEQID_LUT 31 > +#define SEQID_LUT 15 > > /* Registers used by the driver */ > #define FSPI_MCR0 0x00 > -- 2.34.1
> -----Original Message----- > From: Michael Walle <mwalle@kernel.org> > Sent: 2023年12月14日 0:25 > To: Bough Chen <haibo.chen@nxp.com> > Cc: broonie@kernel.org; Han Xu <han.xu@nxp.com>; dl-linux-imx > <linux-imx@nxp.com>; linux-spi@vger.kernel.org; yogeshgaur.83@gmail.com; > Michael Walle <mwalle@kernel.org> > Subject: Re: [PATCH 2/5] spi: spi-nxp-fspi: change the default lut index > > > The fspi dynamic lut use the last lut for all IPS operations, the > > imx8ulp only supports 15 luts, so change the last lut index from > > It's 16 LUTs, no? There's also index 0. Yes, should be 16 LUTs. > > > 31 to 15. > > > > Signed-off-by: Han Xu <han.xu@nxp.com> > > Signed-off-by: Haibo Chen <haibo.chen@nxp.com> > > --- > > drivers/spi/spi-nxp-fspi.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c > > index 0feecf5ba010..9d6b4d22263c 100644 > > --- a/drivers/spi/spi-nxp-fspi.c > > +++ b/drivers/spi/spi-nxp-fspi.c > > @@ -64,9 +64,9 @@ > > /* > > * The driver only uses one single LUT entry, that is updated on > > * each call of exec_op(). Index 0 is preset at boot with a basic > > - * read operation, so let's use the last entry (31). > > + * read operation, so let's use the last entry (15). > > Please add the information about the imx8mulp to the comment. > Otherwise, the comment will be confusing for SoCs where there are 32 LUTs. Yes, will add. Best Regards Haibo Chen > > -michael > > > */ > > -#define SEQID_LUT 31 > > +#define SEQID_LUT 15 > > > > /* Registers used by the driver */ > > #define FSPI_MCR0 0x00 > > -- > 2.34.1 >
On Wed, Dec 13, 2023 at 3:08 AM <haibo.chen@nxp.com> wrote: > > From: Haibo Chen <haibo.chen@nxp.com> > > The fspi dynamic lut use the last lut for all IPS operations, the > imx8ulp only supports 15 luts, so change the last lut index from > 31 to 15. > > Signed-off-by: Han Xu <han.xu@nxp.com> > Signed-off-by: Haibo Chen <haibo.chen@nxp.com> > --- > drivers/spi/spi-nxp-fspi.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c > index 0feecf5ba010..9d6b4d22263c 100644 > --- a/drivers/spi/spi-nxp-fspi.c > +++ b/drivers/spi/spi-nxp-fspi.c > @@ -64,9 +64,9 @@ > /* > * The driver only uses one single LUT entry, that is updated on > * each call of exec_op(). Index 0 is preset at boot with a basic > - * read operation, so let's use the last entry (31). > + * read operation, so let's use the last entry (15). > */ > -#define SEQID_LUT 31 > +#define SEQID_LUT 15 What impact does this have on other SoC's with the FlexSPI with 32? adam > > /* Registers used by the driver */ > #define FSPI_MCR0 0x00 > -- > 2.34.1 > >
> -----Original Message----- > From: Adam Ford <aford173@gmail.com> > Sent: 2023年12月14日 11:04 > To: Bough Chen <haibo.chen@nxp.com> > Cc: broonie@kernel.org; yogeshgaur.83@gmail.com; linux-spi@vger.kernel.org; > dl-linux-imx <linux-imx@nxp.com>; Han Xu <han.xu@nxp.com> > Subject: Re: [PATCH 2/5] spi: spi-nxp-fspi: change the default lut index > > On Wed, Dec 13, 2023 at 3:08 AM <haibo.chen@nxp.com> wrote: > > > > From: Haibo Chen <haibo.chen@nxp.com> > > > > The fspi dynamic lut use the last lut for all IPS operations, the > > imx8ulp only supports 15 luts, so change the last lut index from > > 31 to 15. > > > > Signed-off-by: Han Xu <han.xu@nxp.com> > > Signed-off-by: Haibo Chen <haibo.chen@nxp.com> > > --- > > drivers/spi/spi-nxp-fspi.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c > > index 0feecf5ba010..9d6b4d22263c 100644 > > --- a/drivers/spi/spi-nxp-fspi.c > > +++ b/drivers/spi/spi-nxp-fspi.c > > @@ -64,9 +64,9 @@ > > /* > > * The driver only uses one single LUT entry, that is updated on > > * each call of exec_op(). Index 0 is preset at boot with a basic > > - * read operation, so let's use the last entry (31). > > + * read operation, so let's use the last entry (15). > > */ > > -#define SEQID_LUT 31 > > +#define SEQID_LUT 15 > > What impact does this have on other SoC's with the FlexSPI with 32? No impact, just use another LUT to send command queue. Best Regards Haibo Chen > > adam > > > > /* Registers used by the driver */ > > #define FSPI_MCR0 0x00 > > -- > > 2.34.1 > > > >
diff --git a/drivers/spi/spi-nxp-fspi.c b/drivers/spi/spi-nxp-fspi.c index 0feecf5ba010..9d6b4d22263c 100644 --- a/drivers/spi/spi-nxp-fspi.c +++ b/drivers/spi/spi-nxp-fspi.c @@ -64,9 +64,9 @@ /* * The driver only uses one single LUT entry, that is updated on * each call of exec_op(). Index 0 is preset at boot with a basic - * read operation, so let's use the last entry (31). + * read operation, so let's use the last entry (15). */ -#define SEQID_LUT 31 +#define SEQID_LUT 15 /* Registers used by the driver */ #define FSPI_MCR0 0x00