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Thu, 25 Apr 2024 21:37:06 +0000 Received: from smtpav04.wdc07v.mail.ibm.com (smtpav04.wdc07v.mail.ibm.com [10.39.53.231]) by smtprelay07.dal12v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 43PLb3Gc48693872 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 25 Apr 2024 21:37:06 GMT Received: from smtpav04.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B04F458062; Thu, 25 Apr 2024 21:37:03 +0000 (GMT) Received: from smtpav04.wdc07v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0832E58050; Thu, 25 Apr 2024 21:37:03 +0000 (GMT) Received: from slate16.aus.stglabs.ibm.com (unknown [9.61.133.34]) by smtpav04.wdc07v.mail.ibm.com (Postfix) with ESMTP; Thu, 25 Apr 2024 21:37:02 +0000 (GMT) From: Eddie James To: linux-aspeed@lists.ozlabs.org Cc: eajames@linux.ibm.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-fsi@lists.ozlabs.org, linux-spi@vger.kernel.org, linux-i2c@vger.kernel.org, lakshmiy@us.ibm.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joel@jms.id.au, andrew@codeconstruct.com.au Subject: [PATCH v3 01/14] dt-bindings: spi: Document the IBM Power SPI controller Date: Thu, 25 Apr 2024 16:36:48 -0500 Message-Id: <20240425213701.655540-2-eajames@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240425213701.655540-1-eajames@linux.ibm.com> References: <20240425213701.655540-1-eajames@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: L2CB35zkDOgx9l7mycCD7d5qdof1u4bU X-Proofpoint-GUID: L2CB35zkDOgx9l7mycCD7d5qdof1u4bU X-Proofpoint-UnRewURL: 0 URL was un-rewritten Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-04-25_21,2024-04-25_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 spamscore=0 clxscore=1015 mlxscore=0 bulkscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 suspectscore=0 impostorscore=0 phishscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2404010000 definitions=main-2404250157 The IBM Power chips have a basic SPI controller. Document it. Signed-off-by: Eddie James --- .../devicetree/bindings/spi/ibm,p10-spi.yaml | 56 +++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml diff --git a/Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml b/Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml new file mode 100644 index 000000000000..9bf57b621c1f --- /dev/null +++ b/Documentation/devicetree/bindings/spi/ibm,p10-spi.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/ibm,p10-spi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM SPI Controller + +maintainers: + - Eddie James + +description: + A basic SPI controller found on IBM Power chips, accessed over FSI. This + node will always be a child node of an ibm,fsi2spi node. + +properties: + compatible: + enum: + - ibm,p10-spi + + reg: + maxItems: 1 + +required: + - compatible + - reg + +allOf: + - $ref: spi-controller.yaml# + +unevaluatedProperties: false + +examples: + - | + fsi2spi@1c00 { + compatible = "ibm,fsi2spi"; + reg = <0x1c00 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + spi@0 { + compatible = "ibm,p10-spi"; + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + compatible = "atmel,at25"; + reg = <0>; + size = <0x80000>; + address-width = <24>; + pagesize = <256>; + spi-max-frequency = <1000000>; + }; + }; + };