From patchwork Fri Oct 25 16:14:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 13851055 Received: from relay4-d.mail.gandi.net (relay4-d.mail.gandi.net [217.70.183.196]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2512C187872 for ; Fri, 25 Oct 2024 16:15:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.196 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729872929; cv=none; b=coYx2f4U8vFut92uQowBhy76TevFfm4pDFIWQIg2VyEc84G6y7EsY2gxDULYtJ35l9SUfhbc6zK/LR05FmA/mnQC7Y8KTP/5jpSBXPetrwfCfHpUU2OwA2TvBTsTn7KSPeEnP1mQt1MPJM68KJwaEM5eYszXWxQSNv2DTYBPyHY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729872929; c=relaxed/simple; bh=V7iunp8RpYcvXJs9VJ1uDz8o9vFJcFy1WSAnVCN/qLQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sI367BcBFCtSWPQLt5bhSnN8tPUWydznNz6WEMIId0cCct8v6Qbb2tHqKiGxIWlj6NXB18x3vHDtyPDLHbYV+wy0JtiwqicCDolJy9hg961xhDA3qxsOf0wOMjvfmFgIyno1Fr8U+c8cu5PLjdL2+sT4fNkvnCFXM/nAXmAVsiw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Cofj1aeV; arc=none smtp.client-ip=217.70.183.196 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Cofj1aeV" Received: by mail.gandi.net (Postfix) with ESMTPSA id CB94DE000A; Fri, 25 Oct 2024 16:15:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1729872925; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=pByiemz6sGQ1dAc0XGPZWpgyfqvuQv9orpYDTvxc394=; b=Cofj1aeV4v4w5g1P2JbjfXuAhzb/D/hZUV5QKSjmsliVXNsX0Liy+oxfIcrf4iww7NnfnX f9m2d32g4G1RY0unlEGPoKq6SwXledRpqAERsA6BcF93QdxPjp6opHal0BNXmSuIQz/OFs +N9VZ9xwWEf57iUDdmVBoEMGgFUoLf+1FkTfFrWm0Xt4E8nBTuum1Rj21C9O1JBfgimtsa PFG5LZ0jl0P5FTS56jjxm6J/6d0NKt8uZUPLygt/r/K4acXagLTneqLmmnPWD3ymnyMeCI aaYBSdXbTtBRVDvOiZbjl7LSdfaVUWHysXp33Zt9hftyRkcqMIpzoPQm8tqnBw== From: Miquel Raynal To: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , Cc: Mark Brown , , Steam Lin , Thomas Petazzoni , Sanjay R Mehta , Han Xu , Conor Dooley , Daire McNamara , Matthias Brugger , AngeloGioacchino Del Regno , Haibo Chen , Yogesh Gaur , Heiko Stuebner , Michal Simek , Miquel Raynal Subject: [PATCH 20/24] spi: spi-mem: Reorder SPI_MEM_OP_CMD internals Date: Fri, 25 Oct 2024 18:14:57 +0200 Message-ID: <20241025161501.485684-21-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241025161501.485684-1-miquel.raynal@bootlin.com> References: <20241025161501.485684-1-miquel.raynal@bootlin.com> Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: miquel.raynal@bootlin.com Follow the order used by all the other similar macros: - nbytes - value/buffer - buswidth - other fields There is no functional change. Signed-off-by: Miquel Raynal --- include/linux/spi/spi-mem.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h index 379c048b2eb4..318ea7b193cc 100644 --- a/include/linux/spi/spi-mem.h +++ b/include/linux/spi/spi-mem.h @@ -15,9 +15,9 @@ #define SPI_MEM_OP_CMD(__opcode, __buswidth) \ { \ - .buswidth = __buswidth, \ - .opcode = __opcode, \ .nbytes = 1, \ + .opcode = __opcode, \ + .buswidth = __buswidth, \ } #define SPI_MEM_OP_ADDR(__nbytes, __val, __buswidth) \