From patchwork Sun Nov 13 13:40:18 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heiner Kallweit X-Patchwork-Id: 9424833 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 44F7C60484 for ; Sun, 13 Nov 2016 13:54:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 38A7E27FAC for ; Sun, 13 Nov 2016 13:54:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2D8D028551; Sun, 13 Nov 2016 13:54:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AE23327FAC for ; Sun, 13 Nov 2016 13:54:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933678AbcKMNyx (ORCPT ); Sun, 13 Nov 2016 08:54:53 -0500 Received: from mail-wm0-f65.google.com ([74.125.82.65]:36006 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933668AbcKMNyw (ORCPT ); Sun, 13 Nov 2016 08:54:52 -0500 Received: by mail-wm0-f65.google.com with SMTP id m203so8357011wma.3 for ; Sun, 13 Nov 2016 05:54:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:subject:to:references:cc:message-id:date:user-agent :mime-version:in-reply-to:content-transfer-encoding; bh=bvmgJu2YJg06FdeBfQFQ3UIrzFrLdQMlmtmeUb1iZqU=; b=dnOdmV5oqAOEg4R5sAWd2igIq2ZGOCWcAFXgFs76/1zh9r0ijfTeCJgvDfXhzDE25N 7/XYpnjfUiFwT5EH0N7kS+g7dAZFyBhLkGCIZ9c3TM6Rv6Qj8zNIC1rT0zfMn5voHr3b W4ePpZ5hW4eWlVSJhGSS6NjpZWmSVDSLUtm9+semc8i3QHhf3dOQtQteI1kpRXx+phHO cMo/uXkf4tRmCxcMyUVH8dRq0vRJkBl1Nhxq64kOdXt2FxqkgK9l/XFsw75tx26IfeTM 8Uo07tixY7YwTK6uuu0N/xdpKxFaXf7fIvn4flroqiKF25s4tphvMLVpXeFoEQcEi8Vt eBaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:subject:to:references:cc:message-id:date :user-agent:mime-version:in-reply-to:content-transfer-encoding; bh=bvmgJu2YJg06FdeBfQFQ3UIrzFrLdQMlmtmeUb1iZqU=; b=C9g24/Dhb6Okn4cl7hDifXn0Zd7OEMymBCfgpMcCM1oeId6Xxn0jkqE2lzNuntMuXU 3HNSwwA4pg0CLF5V4QQR0On6mGIuJAcgaHiJhGGb1yk2o8z+Je3fLZhexsSbzOknWo3W OsEthjUZpjtxW6Ho8/kOpkGd9U2cNGfTW9wzkEZaxKJNq1YbpvbYL4Mo+CAPrGYqNH1V WV4V9sIyLq/gf2sdkvZDt8SiGff0/4aqt0JwMsv1W75fetKhpQ8WtSz4NOjCH6nSkZAo vOLj0dz31np6HQlH1wdMThYYObm3vc+1mGADTvZSidhL6hLRoknu+o61T0Hig9D3D+Cc D79w== X-Gm-Message-State: ABUngveedNdm871K7R6NyYCNy8vLEt9rJ/f78E4sLrG16arRU5KKWIXiI9vdAPCiF1c9gA== X-Received: by 10.28.187.67 with SMTP id l64mr1440833wmf.114.1479044484201; Sun, 13 Nov 2016 05:41:24 -0800 (PST) Received: from ?IPv6:2003:62:5f58:9d00:45b5:f382:329:d09c? (p200300625F589D0045B5F3820329D09C.dip0.t-ipconnect.de. [2003:62:5f58:9d00:45b5:f382:329:d09c]) by smtp.googlemail.com with ESMTPSA id hy10sm22595940wjb.10.2016.11.13.05.41.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 13 Nov 2016 05:41:23 -0800 (PST) From: Heiner Kallweit Subject: [PATCH 08/10] spi: fsl-espi: factor out fsl_espi_init_regs To: Mark Brown References: <8057df29-f045-74a8-212a-b228995d752d@gmail.com> Cc: "linux-spi@vger.kernel.org" Message-ID: <4e79541e-d512-8b66-9692-13d20722c9c0@gmail.com> Date: Sun, 13 Nov 2016 14:40:18 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 In-Reply-To: <8057df29-f045-74a8-212a-b228995d752d@gmail.com> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The register initialization is the same in fsl_espi_probe and in of_fsl_espi_resume. Therefore factor it out into fsl_espi_init_regs. It was actually a bug that CSMODE_BEF and CSMODE_AFT were not set in of_fsl_espi_resume. Seems like nobody ever used values other than zero for these parameters. Signed-off-by: Heiner Kallweit --- drivers/spi/spi-fsl-espi.c | 110 +++++++++++++++++++++------------------------ 1 file changed, 50 insertions(+), 60 deletions(-) diff --git a/drivers/spi/spi-fsl-espi.c b/drivers/spi/spi-fsl-espi.c index 5d84694..7a90343 100644 --- a/drivers/spi/spi-fsl-espi.c +++ b/drivers/spi/spi-fsl-espi.c @@ -576,13 +576,58 @@ static size_t fsl_espi_max_message_size(struct spi_device *spi) return SPCOM_TRANLEN_MAX; } +static void fsl_espi_init_regs(struct device *dev, bool initial) +{ + struct spi_master *master = dev_get_drvdata(dev); + struct mpc8xxx_spi *mspi = spi_master_get_devdata(master); + struct device_node *nc; + u32 csmode, cs, prop; + int ret; + + /* SPI controller initializations */ + fsl_espi_write_reg(mspi, ESPI_SPMODE, 0); + fsl_espi_write_reg(mspi, ESPI_SPIM, 0); + fsl_espi_write_reg(mspi, ESPI_SPCOM, 0); + fsl_espi_write_reg(mspi, ESPI_SPIE, 0xffffffff); + + /* Init eSPI CS mode register */ + for_each_available_child_of_node(master->dev.of_node, nc) { + /* get chip select */ + ret = of_property_read_u32(nc, "reg", &cs); + if (ret || cs >= master->num_chipselect) + continue; + + csmode = CSMODE_INIT_VAL; + + /* check if CSBEF is set in device tree */ + ret = of_property_read_u32(nc, "fsl,csbef", &prop); + if (!ret) { + csmode &= ~(CSMODE_BEF(0xf)); + csmode |= CSMODE_BEF(prop); + } + + /* check if CSAFT is set in device tree */ + ret = of_property_read_u32(nc, "fsl,csaft", &prop); + if (!ret) { + csmode &= ~(CSMODE_AFT(0xf)); + csmode |= CSMODE_AFT(prop); + } + + fsl_espi_write_reg(mspi, ESPI_SPMODEx(cs), csmode); + + if (initial) + dev_info(dev, "cs=%u, init_csmode=0x%x\n", cs, csmode); + } + + /* Enable SPI interface */ + fsl_espi_write_reg(mspi, ESPI_SPMODE, SPMODE_INIT_VAL | SPMODE_ENABLE); +} + static int fsl_espi_probe(struct device *dev, struct resource *mem, unsigned int irq, unsigned int num_cs) { struct spi_master *master; struct mpc8xxx_spi *mpc8xxx_spi; - struct device_node *nc; - u32 regval, csmode, cs, prop; int ret; master = spi_alloc_master(dev, sizeof(struct mpc8xxx_spi)); @@ -634,44 +679,7 @@ static int fsl_espi_probe(struct device *dev, struct resource *mem, if (ret) goto err_probe; - /* SPI controller initializations */ - fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODE, 0); - fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPIM, 0); - fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPCOM, 0); - fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPIE, 0xffffffff); - - /* Init eSPI CS mode register */ - for_each_available_child_of_node(master->dev.of_node, nc) { - /* get chip select */ - ret = of_property_read_u32(nc, "reg", &cs); - if (ret || cs >= num_cs) - continue; - - csmode = CSMODE_INIT_VAL; - - /* check if CSBEF is set in device tree */ - ret = of_property_read_u32(nc, "fsl,csbef", &prop); - if (!ret) { - csmode &= ~(CSMODE_BEF(0xf)); - csmode |= CSMODE_BEF(prop); - } - - /* check if CSAFT is set in device tree */ - ret = of_property_read_u32(nc, "fsl,csaft", &prop); - if (!ret) { - csmode &= ~(CSMODE_AFT(0xf)); - csmode |= CSMODE_AFT(prop); - } - - fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODEx(cs), csmode); - - dev_info(dev, "cs=%u, init_csmode=0x%x\n", cs, csmode); - } - - /* Enable SPI interface */ - regval = SPMODE_INIT_VAL | SPMODE_ENABLE; - - fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODE, regval); + fsl_espi_init_regs(dev, true); pm_runtime_set_autosuspend_delay(dev, AUTOSUSPEND_TIMEOUT); pm_runtime_use_autosuspend(dev); @@ -771,27 +779,9 @@ static int of_fsl_espi_suspend(struct device *dev) static int of_fsl_espi_resume(struct device *dev) { struct spi_master *master = dev_get_drvdata(dev); - struct mpc8xxx_spi *mpc8xxx_spi; - u32 regval; - int i, ret; - - mpc8xxx_spi = spi_master_get_devdata(master); - - /* SPI controller initializations */ - fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODE, 0); - fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPIM, 0); - fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPCOM, 0); - fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPIE, 0xffffffff); - - /* Init eSPI CS mode register */ - for (i = 0; i < master->num_chipselect; i++) - fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODEx(i), - CSMODE_INIT_VAL); - - /* Enable SPI interface */ - regval = SPMODE_INIT_VAL | SPMODE_ENABLE; + int ret; - fsl_espi_write_reg(mpc8xxx_spi, ESPI_SPMODE, regval); + fsl_espi_init_regs(dev, false); ret = pm_runtime_force_resume(dev); if (ret < 0)