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[2003:62:5f55:ba00:681b:1517:83c2:9e4a]) by smtp.googlemail.com with ESMTPSA id vr10sm6092817wjc.38.2015.11.21.15.12.46 (version=TLSv1/SSLv3 cipher=OTHER); Sat, 21 Nov 2015 15:12:47 -0800 (PST) From: Heiner Kallweit Subject: [PATCH 2/3] mtd: m25p80: handle HW message size restrictions To: Mark Brown , Brian Norris References: <564CEB61.2000601@gmail.com> <20151118215755.GL31303@sirena.org.uk> <564D0098.4030107@gmail.com> <20151119114057.GN31303@sirena.org.uk> <20151119171538.GO31303@sirena.org.uk> <9CDADBED-FD18-4635-82A9-5AB14C9ABCAE@sperl.org> <20151120120502.GT31303@sirena.org.uk> <08871ECD-52DF-4CBF-AF3D-4C3A442C008A@sperl.org> <20151121134946.GI26072@sirena.org.uk> <56507B3B.4080608@gmail.com> Cc: Michal Suchanek , Martin Sperl , MTD Maling List , "linux-spi@vger.kernel.org" Message-ID: <5650F952.2060409@gmail.com> Date: Sun, 22 Nov 2015 00:08:02 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.3.0 MIME-Version: 1.0 In-Reply-To: Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Extend m25p80_read allowing to read in chunks in case the SPI HW has a max supported message size. Signed-off-by: Heiner Kallweit --- drivers/mtd/devices/m25p80.c | 39 ++++++++++++++++++++++++++++++++++----- 1 file changed, 34 insertions(+), 5 deletions(-) diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index c9c3b7f..df4c510 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -115,11 +115,7 @@ static inline unsigned int m25p80_rx_nbits(struct spi_nor *nor) } } -/* - * Read an address range from the nor chip. The address range - * may be any size provided it is within the physical boundaries. - */ -static int m25p80_read(struct spi_nor *nor, loff_t from, size_t len, +static int _m25p80_read(struct spi_nor *nor, loff_t from, size_t len, size_t *retlen, u_char *buf) { struct m25p *flash = nor->priv; @@ -153,6 +149,39 @@ static int m25p80_read(struct spi_nor *nor, loff_t from, size_t len, } /* + * Read an address range from the nor chip. The address range + * may be any size provided it is within the physical boundaries. + */ +static int m25p80_read(struct spi_nor *nor, loff_t from, size_t len, + size_t *retlen, u_char *buf) +{ + struct m25p *flash = nor->priv; + size_t cmd_len, xfer_len, max_len; + int ret = 0; + + /* convert the dummy cycles to the number of bytes */ + cmd_len = m25p_cmdsz(nor) + nor->read_dummy / 8; + + max_len = flash->spi->master->max_msg_size ?: SIZE_MAX; + + if (unlikely(max_len < cmd_len)) + return -EINVAL; + + max_len -= cmd_len; + + while (len) { + xfer_len = min(len, max_len); + ret = _m25p80_read(nor, from, xfer_len, retlen, buf); + if (ret < 0) + break; + from += xfer_len; + len -= xfer_len; + } + + return ret; +} + +/* * board specific setup should have ensured the SPI clock used here * matches what the READ command supports, at least until this driver * understands FAST_READ (for clocks over 25 MHz).