From patchwork Thu Jul 4 07:07:31 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ??? X-Patchwork-Id: 2822141 Return-Path: X-Original-To: patchwork-spi-devel-general@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id EC962BF4A1 for ; Thu, 4 Jul 2013 07:07:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0A65920141 for ; Thu, 4 Jul 2013 07:07:46 +0000 (UTC) Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D95F020140 for ; Thu, 4 Jul 2013 07:07:44 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=sfs-ml-3.v29.ch3.sourceforge.com) by sfs-ml-3.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1Uuddm-0005ou-7F; Thu, 04 Jul 2013 07:07:42 +0000 Received: from sog-mx-3.v43.ch3.sourceforge.com ([172.29.43.193] helo=mx.sourceforge.net) by sfs-ml-3.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1Uuddj-0005ol-4N for spi-devel-general@lists.sourceforge.net; Thu, 04 Jul 2013 07:07:39 +0000 Received-SPF: pass (sog-mx-3.v43.ch3.sourceforge.com: domain of gmail.com designates 209.85.219.53 as permitted sender) client-ip=209.85.219.53; envelope-from=wangyuhang2014@gmail.com; helo=mail-oa0-f53.google.com; Received: from mail-oa0-f53.google.com ([209.85.219.53]) by sog-mx-3.v43.ch3.sourceforge.com with esmtps (TLSv1:RC4-SHA:128) (Exim 4.76) id 1Uuddh-0007GQ-ES for spi-devel-general@lists.sourceforge.net; Thu, 04 Jul 2013 07:07:39 +0000 Received: by mail-oa0-f53.google.com with SMTP id k14so1438942oag.26 for ; Thu, 04 Jul 2013 00:07:32 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.60.137.225 with SMTP id ql1mr4582895oeb.48.1372921652014; Thu, 04 Jul 2013 00:07:32 -0700 (PDT) Received: by 10.182.73.170 with HTTP; Thu, 4 Jul 2013 00:07:31 -0700 (PDT) Date: Thu, 4 Jul 2013 15:07:31 +0800 Message-ID: Subject: SPI : DUAL/QUAD support From: =?GB2312?B?zfXT7rq9?= To: linux-mtd@lists.infradead.org, spi-devel-general@lists.sourceforge.net, linux-arm-kernel@lists.infradead.org, broonie@kernel.org, grant.likely@secretlab.ca X-Spam-Score: -1.4 (-) X-Headers-End: 1Uuddh-0007GQ-ES X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: spi-devel-general-bounces@lists.sourceforge.net X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM,RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Now some SPI controllers and Slave Devices have supported DUAL and QUAD transfer mode. But SPI controller driver in kernel has no member to deliver this information from Slave to Master. So in my opinion, adding transfer mode members to deal with the problem. In my SPI system, slave device is a Nor-Flash chip(s25fl129p) which use m25p80 driver. My patch below aims to make spi controller know the way that the slave want. Firstly user provides the SPI slave information into spi_board_info, including tx_bitwidth and rx_bitwidth. When the SPI slave is registered, information in spi_board_info is delivered to spi_device. Then SPI slave driver will add the transfer mode information into the spi_tranfer package and send it out to SPI controller driver. SPI controller driver will analyse the transfer package and set the certain transfer mode to its register. This patch do not support device tree.... Signed-off-by: wangyuhang --- drivers/mtd/devices/m25p80.c | 2 ++ drivers/spi/spi.c | 2 ++ include/linux/spi/spi.h | 8 ++++++++ 3 files changed, 12 insertions(+) -- 1.7.9.5 Best regards Jay ------------------------------------------------------------------------------ This SF.net email is sponsored by Windows: Build for Windows Store. http://p.sf.net/sfu/windows-dev2dev diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index 5b6b072..1411678 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -354,6 +354,7 @@ static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len, t[1].rx_buf = buf; t[1].len = len; + t[1].bitwidth = flash->spi->rx_bitwidth; spi_message_add_tail(&t[1], &m); mutex_lock(&flash->lock); @@ -409,6 +410,7 @@ static int m25p80_write(struct mtd_info *mtd, loff_t to, size_t len, spi_message_add_tail(&t[0], &m); t[1].tx_buf = buf; + t[1].bitwidth = flash->spi->tx_bitwidth; spi_message_add_tail(&t[1], &m); mutex_lock(&flash->lock); diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 004b10f..cd99022 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -452,6 +452,8 @@ struct spi_device *spi_new_device(struct spi_master *master, proxy->irq = chip->irq; strlcpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias)); proxy->dev.platform_data = (void *) chip->platform_data; + proxy->rx_bitwidth = chip->rx_bitwidth; + proxy->tx_bitwidth = chip->tx_bitwidth; proxy->controller_data = chip->controller_data; proxy->controller_state = NULL; diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 38c2b92..ddcf308 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -93,6 +93,8 @@ struct spi_device { void *controller_data; char modalias[SPI_NAME_SIZE]; int cs_gpio; /* chip select gpio */ + u8 rx_bitwidth; + u8 tx_bitwidth; /* * likely need more hooks for more protocol options affecting how @@ -511,6 +513,10 @@ struct spi_transfer { dma_addr_t rx_dma; unsigned cs_change:1; + u8 bitwidth; +#define SPI_BITWIDTH_SINGLE 0x01; /* 1bit transfer */ +#define SPI_BITWIDTH_DUAL 0x02; /* 2bits transfer */ +#define SPI_BITWIDTH_QUAD 0x03; /* 4bits transfer */ u8 bits_per_word; u16 delay_usecs; u32 speed_hz; @@ -859,6 +865,8 @@ struct spi_board_info { * where the default of SPI_CS_HIGH = 0 is wrong. */ u8 mode; + u8 rx_bitwidth; + u8 tx_bitwidth; /* ... may need additional spi_device chip config data here. * avoid stuff protocol drivers can set; but include stuff