From patchwork Tue Feb 24 12:26:20 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Torsten Fleischer X-Patchwork-Id: 5872421 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1875E9F169 for ; Tue, 24 Feb 2015 12:26:24 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4EA242021B for ; Tue, 24 Feb 2015 12:26:23 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 712C520222 for ; Tue, 24 Feb 2015 12:26:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752505AbbBXM0W (ORCPT ); Tue, 24 Feb 2015 07:26:22 -0500 Received: from mail-ie0-f181.google.com ([209.85.223.181]:36773 "EHLO mail-ie0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752351AbbBXM0V (ORCPT ); Tue, 24 Feb 2015 07:26:21 -0500 Received: by ierx19 with SMTP id x19so31449904ier.3 for ; Tue, 24 Feb 2015 04:26:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:date:message-id:subject:from:to:content-type; bh=amOIBflVUJn7SYjb8H33ciBChs6A0Gs6AzDZt4l3Phs=; b=idD7eK/SOVBt0jx7tbAg2WPgvz5tjUF9kSR53TFZk9Oz5VrBNU3FBG/eGkwviOrJJH TgoAQuDW2P2dMSJ3UNrD/4+7VoDaRY6gwSZfxx7lG8sDwyF6GL/oKDIE0AJGcNHZ+95D vpMuABjZxoy3bNHqREJO8Tp19nd5h2ZBWuZPG2EbzzPzISvSy1QnGV5669j5as3kV3yc VxLvX8+/DKUgB5Cwzw0Uh68JeB11oGpc1TSK22Z5UVTFOmfqSsOd6kEejYzgiDmZ3ZUQ k4MiQKO+0yeadTrqiDI3Ors8D5m5r4vZE5PyNYNxo4GB0ouPyCENzdI7q9EGyq9IKldb /ppw== MIME-Version: 1.0 X-Received: by 10.43.150.10 with SMTP id km10mr17027001icc.83.1424780780520; Tue, 24 Feb 2015 04:26:20 -0800 (PST) Received: by 10.107.148.149 with HTTP; Tue, 24 Feb 2015 04:26:20 -0800 (PST) Date: Tue, 24 Feb 2015 13:26:20 +0100 Message-ID: Subject: [PATCH 1/1] spi: atmel: Fix interrupt setup for PDC transfers From: Torsten Fleischer To: "nicolas.ferre@atmel.com" , Mark Brown , "linux-spi@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Torsten Fleischer Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Additionally to the current DMA transfer the PDC allows to set up a next DMA transfer. This is useful for larger SPI transfers. The driver currently waits for ENDRX as end of the transfer. But ENDRX is set when the current DMA transfer is done (RCR = 0), i.e. it doesn't include the next DMA transfer. Thus a subsequent SPI transfer could be started although there is currently a transfer in progress. This can cause invalid accesses to the SPI slave devices and to SPI transfer errors. This issue has been observed on a hardware with a M25P128 SPI NOR flash. So instead of ENDRX we should wait for RXBUFF. This flag is set if there is no more DMA transfer in progress (RCR = RNCR = 0). Signed-off-by: Torsten Fleischer --- drivers/spi/spi-atmel.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 9af7841..06de340 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -764,17 +764,17 @@ static void atmel_spi_pdc_next_xfer(struct spi_master *master, (unsigned long long)xfer->rx_dma); } - /* REVISIT: We're waiting for ENDRX before we start the next + /* REVISIT: We're waiting for RXBUFF before we start the next * transfer because we need to handle some difficult timing - * issues otherwise. If we wait for ENDTX in one transfer and - * then starts waiting for ENDRX in the next, it's difficult - * to tell the difference between the ENDRX interrupt we're - * actually waiting for and the ENDRX interrupt of the + * issues otherwise. If we wait for TXBUFE in one transfer and + * then starts waiting for RXBUFF in the next, it's difficult + * to tell the difference between the RXBUFF interrupt we're + * actually waiting for and the RXBUFF interrupt of the * previous transfer. * * It should be doable, though. Just not now... */ - spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES)); + spi_writel(as, IER, SPI_BIT(RXBUFF) | SPI_BIT(OVRES)); spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN)); }