From patchwork Thu Oct 22 23:57:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 7468671 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 991049F36A for ; Thu, 22 Oct 2015 23:57:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 98C7F2080D for ; Thu, 22 Oct 2015 23:57:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A5804207DE for ; Thu, 22 Oct 2015 23:57:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757380AbbJVX51 (ORCPT ); Thu, 22 Oct 2015 19:57:27 -0400 Received: from mezzanine.sirena.org.uk ([106.187.55.193]:60233 "EHLO mezzanine.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756907AbbJVX50 (ORCPT ); Thu, 22 Oct 2015 19:57:26 -0400 Received: from [211.36.156.43] (helo=finisterre) by mezzanine.sirena.org.uk with esmtpsa (TLS1.2:RSA_AES_128_CBC_SHA1:128) (Exim 4.80) (envelope-from ) id 1ZpPjY-0003rO-SI; Thu, 22 Oct 2015 23:57:25 +0000 Received: from broonie by finisterre with local (Exim 4.86) (envelope-from ) id 1ZpPjS-0002z4-7x; Fri, 23 Oct 2015 08:57:18 +0900 From: Mark Brown To: Jarkko Nikula , Mark Brown Cc: linux-spi@vger.kernel.org In-Reply-To: <1445521485-2029-4-git-send-email-jarkko.nikula@linux.intel.com> Message-Id: Date: Fri, 23 Oct 2015 08:57:18 +0900 X-SA-Exim-Connect-IP: 211.36.156.43 X-SA-Exim-Mail-From: broonie@sirena.org.uk X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Subject: Applied "spi: pxa2xx: Save other reg_cs_ctrl bits when configuring chip select" to the spi tree X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:24:06 +0000) X-SA-Exim-Scanned: Yes (on mezzanine.sirena.org.uk) Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The patch spi: pxa2xx: Save other reg_cs_ctrl bits when configuring chip select has been applied to the spi tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark From 0e8972187971ac6c29a9e5899fa6c555c739237c Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Thu, 22 Oct 2015 16:44:42 +0300 Subject: [PATCH] spi: pxa2xx: Save other reg_cs_ctrl bits when configuring chip select Upcoming Intel platforms use LPSS SPI_CS_CONTROL register bits 15:12 for configuring the chip select polarities. Touch only chip select SW mode and state bits when enabling the software chip select control in order to not clear any other bits in the register. Signed-off-by: Jarkko Nikula Signed-off-by: Mark Brown --- drivers/spi/spi-pxa2xx.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index db9016b..4dc5660 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -249,7 +249,9 @@ static void lpss_ssp_setup(struct driver_data *drv_data) drv_data->lpss_base = drv_data->ioaddr + config->offset; /* Enable software chip select control */ - value = SPI_CS_CONTROL_SW_MODE | SPI_CS_CONTROL_CS_HIGH; + value = __lpss_ssp_read_priv(drv_data, config->reg_cs_ctrl); + value &= ~(SPI_CS_CONTROL_SW_MODE | SPI_CS_CONTROL_CS_HIGH); + value |= SPI_CS_CONTROL_SW_MODE | SPI_CS_CONTROL_CS_HIGH; __lpss_ssp_write_priv(drv_data, config->reg_cs_ctrl, value); /* Enable multiblock DMA transfers */