From patchwork Fri Oct 30 02:20:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 7523291 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D397FBEEA4 for ; Fri, 30 Oct 2015 02:21:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B99D42053F for ; Fri, 30 Oct 2015 02:20:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A084E20607 for ; Fri, 30 Oct 2015 02:20:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757796AbbJ3CUv (ORCPT ); Thu, 29 Oct 2015 22:20:51 -0400 Received: from mezzanine.sirena.org.uk ([106.187.55.193]:41062 "EHLO mezzanine.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757371AbbJ3CUt (ORCPT ); Thu, 29 Oct 2015 22:20:49 -0400 Received: from [222.106.49.2] (helo=finisterre) by mezzanine.sirena.org.uk with esmtpsa (TLS1.2:RSA_AES_128_CBC_SHA1:128) (Exim 4.80) (envelope-from ) id 1ZrzJ8-00047M-IN; Fri, 30 Oct 2015 02:20:46 +0000 Received: from broonie by finisterre with local (Exim 4.86) (envelope-from ) id 1ZrzJ8-0001q0-5d; Fri, 30 Oct 2015 11:20:46 +0900 From: Mark Brown To: Jarkko Nikula , Mark Brown Cc: linux-spi@vger.kernel.org In-Reply-To: <1446038023-8819-3-git-send-email-jarkko.nikula@linux.intel.com> Message-Id: Date: Fri, 30 Oct 2015 11:20:46 +0900 X-SA-Exim-Connect-IP: 222.106.49.2 X-SA-Exim-Mail-From: broonie@sirena.org.uk X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Spam-Level: X-Spam-Status: No, score=-6.1 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_WEB, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Subject: Re: [PATCH 3/5] spi: pxa2xx: Detect number of enabled Intel LPSS SPI chip select signals X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:24:06 +0000) X-SA-Exim-Scanned: Yes (on mezzanine.sirena.org.uk) Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The patch spi: pxa2xx: Detect number of enabled Intel LPSS SPI chip select signals has been applied to the spi tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark From 8b136baa5892f25bba0373d6eb0f5f84efc93986 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Wed, 28 Oct 2015 15:13:41 +0200 Subject: [PATCH] spi: pxa2xx: Detect number of enabled Intel LPSS SPI chip select signals SPI capabilities register located in private registers space of newer Intel LPSS SPI host controllers tell in register bits 12:9 which chip select signals are enabled. Use that information for detecting the number of chip selects. For simplicity we assume chip selects are enabled one after another without disabled chip selects between. For instance CS0 | CS1 | CS2 but not CS0 | CS1 | CS3. Signed-off-by: Jarkko Nikula Signed-off-by: Mark Brown --- drivers/spi/spi-pxa2xx.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 040f6bb..a5c2dce 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include #include #include #include @@ -66,6 +67,8 @@ MODULE_ALIAS("platform:pxa2xx-spi"); #define LPSS_CS_CONTROL_CS_HIGH BIT(1) #define LPSS_CS_CONTROL_CS_SEL_SHIFT 8 #define LPSS_CS_CONTROL_CS_SEL_MASK (3 << LPSS_CS_CONTROL_CS_SEL_SHIFT) +#define LPSS_CAPS_CS_EN_SHIFT 9 +#define LPSS_CAPS_CS_EN_MASK (0xf << LPSS_CAPS_CS_EN_SHIFT) struct lpss_config { /* LPSS offset from drv_data->ioaddr */ @@ -74,6 +77,7 @@ struct lpss_config { int reg_general; int reg_ssp; int reg_cs_ctrl; + int reg_capabilities; /* FIFO thresholds */ u32 rx_threshold; u32 tx_threshold_lo; @@ -87,6 +91,7 @@ static const struct lpss_config lpss_platforms[] = { .reg_general = 0x08, .reg_ssp = 0x0c, .reg_cs_ctrl = 0x18, + .reg_capabilities = -1, .rx_threshold = 64, .tx_threshold_lo = 160, .tx_threshold_hi = 224, @@ -96,6 +101,7 @@ static const struct lpss_config lpss_platforms[] = { .reg_general = 0x08, .reg_ssp = 0x0c, .reg_cs_ctrl = 0x18, + .reg_capabilities = -1, .rx_threshold = 64, .tx_threshold_lo = 160, .tx_threshold_hi = 224, @@ -105,6 +111,7 @@ static const struct lpss_config lpss_platforms[] = { .reg_general = -1, .reg_ssp = 0x20, .reg_cs_ctrl = 0x24, + .reg_capabilities = 0xfc, .rx_threshold = 1, .tx_threshold_lo = 32, .tx_threshold_hi = 56, @@ -1400,6 +1407,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) struct spi_master *master; struct driver_data *drv_data; struct ssp_device *ssp; + const struct lpss_config *config; int status; u32 tmp; @@ -1439,7 +1447,6 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP; master->bus_num = ssp->port_id; - master->num_chipselect = platform_info->num_chipselect; master->dma_alignment = DMA_ALIGNMENT; master->cleanup = cleanup; master->setup = setup; @@ -1525,6 +1532,19 @@ static int pxa2xx_spi_probe(struct platform_device *pdev) if (is_lpss_ssp(drv_data)) lpss_ssp_setup(drv_data); + if (is_lpss_ssp(drv_data)) { + lpss_ssp_setup(drv_data); + config = lpss_get_config(drv_data); + if (config->reg_capabilities >= 0) { + tmp = __lpss_ssp_read_priv(drv_data, + config->reg_capabilities); + tmp &= LPSS_CAPS_CS_EN_MASK; + tmp >>= LPSS_CAPS_CS_EN_SHIFT; + platform_info->num_chipselect = ffz(tmp); + } + } + master->num_chipselect = platform_info->num_chipselect; + tasklet_init(&drv_data->pump_transfers, pump_transfers, (unsigned long)drv_data);