From patchwork Thu Jun 30 12:15:58 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 9207343 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5B64E60752 for ; Thu, 30 Jun 2016 12:18:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4BD2B2867B for ; Thu, 30 Jun 2016 12:18:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 405B62867D; Thu, 30 Jun 2016 12:18:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D94B42867B for ; Thu, 30 Jun 2016 12:18:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752131AbcF3MQK (ORCPT ); Thu, 30 Jun 2016 08:16:10 -0400 Received: from mezzanine.sirena.org.uk ([106.187.55.193]:58660 "EHLO mezzanine.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752061AbcF3MQG (ORCPT ); Thu, 30 Jun 2016 08:16:06 -0400 Received: from [137.158.23.105] (helo=finisterre) by mezzanine.sirena.org.uk with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.84_2) (envelope-from ) id 1bIat2-0000MW-0b; Thu, 30 Jun 2016 12:16:04 +0000 Received: from broonie by finisterre with local (Exim 4.87) (envelope-from ) id 1bIasw-0001FU-Nj; Thu, 30 Jun 2016 13:15:58 +0100 From: Mark Brown To: Andi Shyti Cc: Mark Brown , Mark Brown , Kukjin Kim , Krzysztof Kozlowski , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Andi Shyti In-Reply-To: <1466150245-2648-3-git-send-email-andi.shyti@samsung.com> Message-Id: Date: Thu, 30 Jun 2016 13:15:58 +0100 X-SA-Exim-Connect-IP: 137.158.23.105 X-SA-Exim-Mail-From: broonie@sirena.org.uk Subject: Applied "spi: s3c64xx: group the CS signalling writes in a single function" to the spi tree X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:24:06 +0000) X-SA-Exim-Scanned: Yes (on mezzanine.sirena.org.uk) Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The patch spi: s3c64xx: group the CS signalling writes in a single function has been applied to the spi tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark From aa4964c4eb3ed38666023bcb805403cb7cf2af63 Mon Sep 17 00:00:00 2001 From: Andi Shyti Date: Tue, 28 Jun 2016 11:41:11 +0900 Subject: [PATCH] spi: s3c64xx: group the CS signalling writes in a single function To enable/disable the CS line, the driver performs a writel in the S3C64XX_SPI_SLAVE_SEL registers. Group the register's configuration in a single function. Signed-off-by: Andi Shyti Signed-off-by: Mark Brown --- drivers/spi/spi-s3c64xx.c | 36 ++++++++++++++++++++++++++---------- 1 file changed, 26 insertions(+), 10 deletions(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 5a76a50063b5..972367d5c7f2 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -310,6 +310,28 @@ static void prepare_dma(struct s3c64xx_spi_dma_data *dma, dma_async_issue_pending(dma->ch); } +static void s3c64xx_spi_set_cs(struct spi_device *spi, bool enable) +{ + struct s3c64xx_spi_driver_data *sdd = + spi_master_get_devdata(spi->master); + + if (enable) { + if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO)) { + writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL); + } else { + u32 ssel = readl(sdd->regs + S3C64XX_SPI_SLAVE_SEL); + + ssel |= (S3C64XX_SPI_SLAVE_AUTO | + S3C64XX_SPI_SLAVE_NSC_CNT_2); + writel(ssel, sdd->regs + S3C64XX_SPI_SLAVE_SEL); + } + } else { + if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO)) + writel(S3C64XX_SPI_SLAVE_SIG_INACT, + sdd->regs + S3C64XX_SPI_SLAVE_SEL); + } +} + static int s3c64xx_spi_prepare_transfer(struct spi_master *spi) { struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi); @@ -706,12 +728,7 @@ static int s3c64xx_spi_transfer_one(struct spi_master *master, enable_datapath(sdd, spi, xfer, use_dma); /* Start the signals */ - if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO)) - writel(0, sdd->regs + S3C64XX_SPI_SLAVE_SEL); - else - writel(readl(sdd->regs + S3C64XX_SPI_SLAVE_SEL) - | S3C64XX_SPI_SLAVE_AUTO | S3C64XX_SPI_SLAVE_NSC_CNT_2, - sdd->regs + S3C64XX_SPI_SLAVE_SEL); + s3c64xx_spi_set_cs(spi, true); spin_unlock_irqrestore(&sdd->lock, flags); @@ -861,16 +878,15 @@ static int s3c64xx_spi_setup(struct spi_device *spi) pm_runtime_mark_last_busy(&sdd->pdev->dev); pm_runtime_put_autosuspend(&sdd->pdev->dev); - if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO)) - writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL); + s3c64xx_spi_set_cs(spi, false); + return 0; setup_exit: pm_runtime_mark_last_busy(&sdd->pdev->dev); pm_runtime_put_autosuspend(&sdd->pdev->dev); /* setup() returns with device de-selected */ - if (!(sdd->port_conf->quirks & S3C64XX_SPI_QUIRK_CS_AUTO)) - writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL); + s3c64xx_spi_set_cs(spi, false); if (gpio_is_valid(spi->cs_gpio)) gpio_free(spi->cs_gpio);