From patchwork Mon Sep 12 19:08:03 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 9327675 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 27E1360D00 for ; Mon, 12 Sep 2016 19:08:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 11FC528E90 for ; Mon, 12 Sep 2016 19:08:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 06C8C28E94; Mon, 12 Sep 2016 19:08:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 28B7D28E93 for ; Mon, 12 Sep 2016 19:08:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755218AbcILTIP (ORCPT ); Mon, 12 Sep 2016 15:08:15 -0400 Received: from mezzanine.sirena.org.uk ([106.187.55.193]:33120 "EHLO mezzanine.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752168AbcILTIM (ORCPT ); Mon, 12 Sep 2016 15:08:12 -0400 Received: from debutante.sirena.org.uk ([2a01:348:6:8808:fab::3] helo=debutante) by mezzanine.sirena.org.uk with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.84_2) (envelope-from ) id 1bjWaM-0003Bu-Ii; Mon, 12 Sep 2016 19:08:08 +0000 Received: from broonie by debutante with local (Exim 4.87) (envelope-from ) id 1bjWaJ-0002pJ-SL; Mon, 12 Sep 2016 20:08:03 +0100 From: Mark Brown To: Matthias Seidel Cc: Mark Brown , Mark Brown , linux-spi@vger.kernel.org In-Reply-To: <20160906191652.01a11698@vm> Message-Id: Date: Mon, 12 Sep 2016 20:08:03 +0100 X-SA-Exim-Connect-IP: 2a01:348:6:8808:fab::3 X-SA-Exim-Mail-From: broonie@sirena.org.uk Subject: Applied "spi: dw: round up result of calculation for clock divider" to the spi tree X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:24:06 +0000) X-SA-Exim-Scanned: No (on mezzanine.sirena.org.uk); Unknown failure Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The patch spi: dw: round up result of calculation for clock divider has been applied to the spi tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark From 3aef463222eaf1ca505629e93a0b64e4040a4472 Mon Sep 17 00:00:00 2001 From: Matthias Seidel Date: Wed, 7 Sep 2016 17:45:30 +0200 Subject: [PATCH] spi: dw: round up result of calculation for clock divider Avoid ending up with a higher frequency than requested Signed-off-by: Matthias Seidel Signed-off-by: Mark Brown --- drivers/spi/spi-dw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c index c85e4b327a4a..27960e46135d 100644 --- a/drivers/spi/spi-dw.c +++ b/drivers/spi/spi-dw.c @@ -300,7 +300,7 @@ static int dw_spi_transfer_one(struct spi_master *master, if (transfer->speed_hz != dws->current_freq) { if (transfer->speed_hz != chip->speed_hz) { /* clk_div doesn't support odd number */ - chip->clk_div = (dws->max_freq / transfer->speed_hz + 1) & 0xfffe; + chip->clk_div = (DIV_ROUND_UP(dws->max_freq, transfer->speed_hz) + 1) & 0xfffe; chip->speed_hz = transfer->speed_hz; } dws->current_freq = transfer->speed_hz;