From patchwork Mon Jul 17 16:06:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 9845569 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9C9AE6037F for ; Mon, 17 Jul 2017 16:07:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8F2882679B for ; Mon, 17 Jul 2017 16:07:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 80DE526E97; Mon, 17 Jul 2017 16:07:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 17AEC27FB3 for ; Mon, 17 Jul 2017 16:07:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751587AbdGQQHG (ORCPT ); Mon, 17 Jul 2017 12:07:06 -0400 Received: from mezzanine.sirena.org.uk ([106.187.55.193]:56250 "EHLO mezzanine.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751324AbdGQQHF (ORCPT ); Mon, 17 Jul 2017 12:07:05 -0400 Received: from debutante.sirena.org.uk ([2001:470:1f1d:6b5::3] helo=debutante) by mezzanine.sirena.org.uk with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1dX8Xz-0002wW-1u; Mon, 17 Jul 2017 16:07:01 +0000 Received: from broonie by debutante with local (Exim 4.89) (envelope-from ) id 1dX8Xw-0005GJ-FP; Mon, 17 Jul 2017 17:06:56 +0100 From: Mark Brown To: Geert Uytterhoeven Cc: Mark Brown , Mark Brown , linux-spi@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-spi@vger.kernel.org In-Reply-To: <1499855161-20518-1-git-send-email-geert+renesas@glider.be> Message-Id: Date: Mon, 17 Jul 2017 17:06:56 +0100 X-SA-Exim-Connect-IP: 2001:470:1f1d:6b5::3 X-SA-Exim-Mail-From: broonie@sirena.org.uk Subject: Applied "spi: sh-msiof: Limit minimum divider on R-Car Gen3" to the spi tree X-SA-Exim-Version: 4.2.1 (built Tue, 02 Aug 2016 21:08:31 +0000) X-SA-Exim-Scanned: No (on mezzanine.sirena.org.uk); Unknown failure Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The patch spi: sh-msiof: Limit minimum divider on R-Car Gen3 has been applied to the spi tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark From 61a8dec502b873879fa240ec7614601523b46a43 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 12 Jul 2017 12:26:01 +0200 Subject: [PATCH] spi: sh-msiof: Limit minimum divider on R-Car Gen3 On R-Car Gen3 SoCs (excluding R-Car H3 ES1.x, which cannot be used for SPI due to a hardware erratum), BRPS x BRDV = 1/1 is an invalid divider setting. Implement this limitation using an SoC/family-specific minimum divider. Signed-off-by: Geert Uytterhoeven Signed-off-by: Mark Brown --- drivers/spi/spi-sh-msiof.c | 32 +++++++++++++++++++++++--------- 1 file changed, 23 insertions(+), 9 deletions(-) diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index c304c7167866..0eb1e9583485 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -38,6 +38,7 @@ struct sh_msiof_chipdata { u16 tx_fifo_size; u16 rx_fifo_size; u16 master_flags; + u16 min_div; }; struct sh_msiof_spi_priv { @@ -49,6 +50,7 @@ struct sh_msiof_spi_priv { struct completion done; unsigned int tx_fifo_size; unsigned int rx_fifo_size; + unsigned int min_div; void *tx_dma_page; void *rx_dma_page; dma_addr_t tx_dma_addr; @@ -261,6 +263,8 @@ static void sh_msiof_spi_set_clk_regs(struct sh_msiof_spi_priv *p, if (!WARN_ON(!spi_hz || !parent_rate)) div = DIV_ROUND_UP(parent_rate, spi_hz); + div = max_t(unsigned long, div, p->min_div); + for (k = 0; k < ARRAY_SIZE(sh_msiof_spi_div_table); k++) { brps = DIV_ROUND_UP(div, sh_msiof_spi_div_table[k].div); /* SCR_BRDV_DIV_1 is valid only if BRPS is x 1/1 or x 1/2 */ @@ -998,24 +1002,33 @@ static const struct sh_msiof_chipdata sh_data = { .tx_fifo_size = 64, .rx_fifo_size = 64, .master_flags = 0, + .min_div = 1, +}; + +static const struct sh_msiof_chipdata rcar_gen2_data = { + .tx_fifo_size = 64, + .rx_fifo_size = 64, + .master_flags = SPI_MASTER_MUST_TX, + .min_div = 1, }; -static const struct sh_msiof_chipdata r8a779x_data = { +static const struct sh_msiof_chipdata rcar_gen3_data = { .tx_fifo_size = 64, .rx_fifo_size = 64, .master_flags = SPI_MASTER_MUST_TX, + .min_div = 2, }; static const struct of_device_id sh_msiof_match[] = { { .compatible = "renesas,sh-mobile-msiof", .data = &sh_data }, - { .compatible = "renesas,msiof-r8a7790", .data = &r8a779x_data }, - { .compatible = "renesas,msiof-r8a7791", .data = &r8a779x_data }, - { .compatible = "renesas,msiof-r8a7792", .data = &r8a779x_data }, - { .compatible = "renesas,msiof-r8a7793", .data = &r8a779x_data }, - { .compatible = "renesas,msiof-r8a7794", .data = &r8a779x_data }, - { .compatible = "renesas,rcar-gen2-msiof", .data = &r8a779x_data }, - { .compatible = "renesas,msiof-r8a7796", .data = &r8a779x_data }, - { .compatible = "renesas,rcar-gen3-msiof", .data = &r8a779x_data }, + { .compatible = "renesas,msiof-r8a7790", .data = &rcar_gen2_data }, + { .compatible = "renesas,msiof-r8a7791", .data = &rcar_gen2_data }, + { .compatible = "renesas,msiof-r8a7792", .data = &rcar_gen2_data }, + { .compatible = "renesas,msiof-r8a7793", .data = &rcar_gen2_data }, + { .compatible = "renesas,msiof-r8a7794", .data = &rcar_gen2_data }, + { .compatible = "renesas,rcar-gen2-msiof", .data = &rcar_gen2_data }, + { .compatible = "renesas,msiof-r8a7796", .data = &rcar_gen3_data }, + { .compatible = "renesas,rcar-gen3-msiof", .data = &rcar_gen3_data }, { .compatible = "renesas,sh-msiof", .data = &sh_data }, /* Deprecated */ {}, }; @@ -1230,6 +1243,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev) platform_set_drvdata(pdev, p); p->master = master; p->info = info; + p->min_div = chipdata->min_div; init_completion(&p->done);