From patchwork Tue Aug 8 11:18:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 9887499 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 877FD60352 for ; Tue, 8 Aug 2017 11:21:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 79EF527F8C for ; Tue, 8 Aug 2017 11:21:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6EC0B2879C; Tue, 8 Aug 2017 11:21:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D7ABD27F8C for ; Tue, 8 Aug 2017 11:21:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752203AbdHHLVL (ORCPT ); Tue, 8 Aug 2017 07:21:11 -0400 Received: from mezzanine.sirena.org.uk ([106.187.55.193]:55320 "EHLO mezzanine.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752337AbdHHLSa (ORCPT ); Tue, 8 Aug 2017 07:18:30 -0400 Received: from [2001:470:1f1d:6b5:7e7a:91ff:fede:4a45] (helo=finisterre) by mezzanine.sirena.org.uk with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1df2Wl-0000i5-C0; Tue, 08 Aug 2017 11:18:25 +0000 Received: from broonie by finisterre with local (Exim 4.89) (envelope-from ) id 1df2Wi-0006Kn-Iq; Tue, 08 Aug 2017 12:18:20 +0100 From: Mark Brown To: Varadarajan Narayanan Cc: Andy Gross , Mark Brown , broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, andy.gross@linaro.org, david.brown@linaro.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-spi@vger.kernel.org In-Reply-To: <1500882445-29008-8-git-send-email-varada@codeaurora.org> Message-Id: Date: Tue, 08 Aug 2017 12:18:20 +0100 X-SA-Exim-Connect-IP: 2001:470:1f1d:6b5:7e7a:91ff:fede:4a45 X-SA-Exim-Mail-From: broonie@sirena.org.uk Subject: Applied "spi: qup: Do block sized read/write in block mode" to the spi tree X-SA-Exim-Version: 4.2.1 (built Tue, 02 Aug 2016 21:08:31 +0000) X-SA-Exim-Scanned: No (on mezzanine.sirena.org.uk); Unknown failure Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The patch spi: qup: Do block sized read/write in block mode has been applied to the spi tree at git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark From 7538726f9ddaa53b72d61116728cf2d189b05202 Mon Sep 17 00:00:00 2001 From: Varadarajan Narayanan Date: Fri, 28 Jul 2017 12:22:54 +0530 Subject: [PATCH] spi: qup: Do block sized read/write in block mode This patch corrects the behavior of the BLOCK transactions. During block transactions, the controller must be read/written to in block size transactions. Signed-off-by: Andy Gross Signed-off-by: Varadarajan Narayanan Signed-off-by: Mark Brown --- drivers/spi/spi-qup.c | 151 +++++++++++++++++++++++++++++++++++++++----------- 1 file changed, 119 insertions(+), 32 deletions(-) diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c index a7c630c4788c..8cfa112bb142 100644 --- a/drivers/spi/spi-qup.c +++ b/drivers/spi/spi-qup.c @@ -82,6 +82,8 @@ #define QUP_IO_M_MODE_BAM 3 /* QUP_OPERATIONAL fields */ +#define QUP_OP_IN_BLOCK_READ_REQ BIT(13) +#define QUP_OP_OUT_BLOCK_WRITE_REQ BIT(12) #define QUP_OP_MAX_INPUT_DONE_FLAG BIT(11) #define QUP_OP_MAX_OUTPUT_DONE_FLAG BIT(10) #define QUP_OP_IN_SERVICE_FLAG BIT(9) @@ -154,6 +156,13 @@ struct spi_qup { struct dma_slave_config tx_conf; }; +static inline bool spi_qup_is_flag_set(struct spi_qup *controller, u32 flag) +{ + u32 opflag = readl_relaxed(controller->base + QUP_OPERATIONAL); + + return (opflag & flag) != 0; +} + static inline bool spi_qup_is_dma_xfer(int mode) { if (mode == QUP_IO_M_MODE_DMOV || mode == QUP_IO_M_MODE_BAM) @@ -214,29 +223,26 @@ static int spi_qup_set_state(struct spi_qup *controller, u32 state) return 0; } -static void spi_qup_fifo_read(struct spi_qup *controller, - struct spi_transfer *xfer) +static void spi_qup_read_from_fifo(struct spi_qup *controller, + struct spi_transfer *xfer, u32 num_words) { u8 *rx_buf = xfer->rx_buf; - u32 word, state; - int idx, shift, w_size; + int i, shift, num_bytes; + u32 word; - w_size = controller->w_size; - - while (controller->rx_bytes < xfer->len) { - - state = readl_relaxed(controller->base + QUP_OPERATIONAL); - if (0 == (state & QUP_OP_IN_FIFO_NOT_EMPTY)) - break; + for (; num_words; num_words--) { word = readl_relaxed(controller->base + QUP_INPUT_FIFO); + num_bytes = min_t(int, xfer->len - controller->rx_bytes, + controller->w_size); + if (!rx_buf) { - controller->rx_bytes += w_size; + controller->rx_bytes += num_bytes; continue; } - for (idx = 0; idx < w_size; idx++, controller->rx_bytes++) { + for (i = 0; i < num_bytes; i++, controller->rx_bytes++) { /* * The data format depends on bytes per SPI word: * 4 bytes: 0x12345678 @@ -244,38 +250,80 @@ static void spi_qup_fifo_read(struct spi_qup *controller, * 1 byte : 0x00000012 */ shift = BITS_PER_BYTE; - shift *= (w_size - idx - 1); + shift *= (controller->w_size - i - 1); rx_buf[controller->rx_bytes] = word >> shift; } } } -static void spi_qup_fifo_write(struct spi_qup *controller, +static void spi_qup_read(struct spi_qup *controller, struct spi_transfer *xfer) { - const u8 *tx_buf = xfer->tx_buf; - u32 word, state, data; - int idx, w_size; + u32 remainder, words_per_block, num_words; + bool is_block_mode = controller->mode == QUP_IO_M_MODE_BLOCK; + + remainder = DIV_ROUND_UP(xfer->len - controller->rx_bytes, + controller->w_size); + words_per_block = controller->in_blk_sz >> 2; + + do { + /* ACK by clearing service flag */ + writel_relaxed(QUP_OP_IN_SERVICE_FLAG, + controller->base + QUP_OPERATIONAL); + + if (is_block_mode) { + num_words = (remainder > words_per_block) ? + words_per_block : remainder; + } else { + if (!spi_qup_is_flag_set(controller, + QUP_OP_IN_FIFO_NOT_EMPTY)) + break; - w_size = controller->w_size; + num_words = 1; + } - while (controller->tx_bytes < xfer->len) { + /* read up to the maximum transfer size available */ + spi_qup_read_from_fifo(controller, xfer, num_words); - state = readl_relaxed(controller->base + QUP_OPERATIONAL); - if (state & QUP_OP_OUT_FIFO_FULL) + remainder -= num_words; + + /* if block mode, check to see if next block is available */ + if (is_block_mode && !spi_qup_is_flag_set(controller, + QUP_OP_IN_BLOCK_READ_REQ)) break; + } while (remainder); + + /* + * Due to extra stickiness of the QUP_OP_IN_SERVICE_FLAG during block + * mode reads, it has to be cleared again at the very end + */ + if (is_block_mode && spi_qup_is_flag_set(controller, + QUP_OP_MAX_INPUT_DONE_FLAG)) + writel_relaxed(QUP_OP_IN_SERVICE_FLAG, + controller->base + QUP_OPERATIONAL); + +} + +static void spi_qup_write_to_fifo(struct spi_qup *controller, + struct spi_transfer *xfer, u32 num_words) +{ + const u8 *tx_buf = xfer->tx_buf; + int i, num_bytes; + u32 word, data; + + for (; num_words; num_words--) { word = 0; - for (idx = 0; idx < w_size; idx++, controller->tx_bytes++) { - if (!tx_buf) { - controller->tx_bytes += w_size; - break; + num_bytes = min_t(int, xfer->len - controller->tx_bytes, + controller->w_size); + if (tx_buf) + for (i = 0; i < num_bytes; i++) { + data = tx_buf[controller->tx_bytes + i]; + word |= data << (BITS_PER_BYTE * (3 - i)); } - data = tx_buf[controller->tx_bytes]; - word |= data << (BITS_PER_BYTE * (3 - idx)); - } + controller->tx_bytes += num_bytes; writel_relaxed(word, controller->base + QUP_OUTPUT_FIFO); } @@ -288,6 +336,44 @@ static void spi_qup_dma_done(void *data) complete(&qup->done); } +static void spi_qup_write(struct spi_qup *controller, + struct spi_transfer *xfer) +{ + bool is_block_mode = controller->mode == QUP_IO_M_MODE_BLOCK; + u32 remainder, words_per_block, num_words; + + remainder = DIV_ROUND_UP(xfer->len - controller->tx_bytes, + controller->w_size); + words_per_block = controller->out_blk_sz >> 2; + + do { + /* ACK by clearing service flag */ + writel_relaxed(QUP_OP_OUT_SERVICE_FLAG, + controller->base + QUP_OPERATIONAL); + + if (is_block_mode) { + num_words = (remainder > words_per_block) ? + words_per_block : remainder; + } else { + if (spi_qup_is_flag_set(controller, + QUP_OP_OUT_FIFO_FULL)) + break; + + num_words = 1; + } + + spi_qup_write_to_fifo(controller, xfer, num_words); + + remainder -= num_words; + + /* if block mode, check to see if next block is available */ + if (is_block_mode && !spi_qup_is_flag_set(controller, + QUP_OP_OUT_BLOCK_WRITE_REQ)) + break; + + } while (remainder); +} + static int spi_qup_prep_sg(struct spi_master *master, struct spi_transfer *xfer, enum dma_transfer_direction dir, dma_async_tx_callback callback) @@ -391,7 +477,8 @@ static int spi_qup_do_pio(struct spi_master *master, struct spi_transfer *xfer, return ret; } - spi_qup_fifo_write(qup, xfer); + if (qup->mode == QUP_IO_M_MODE_FIFO) + spi_qup_write(qup, xfer); ret = spi_qup_set_state(qup, QUP_STATE_RUN); if (ret) { @@ -446,10 +533,10 @@ static irqreturn_t spi_qup_qup_irq(int irq, void *dev_id) writel_relaxed(opflags, controller->base + QUP_OPERATIONAL); } else { if (opflags & QUP_OP_IN_SERVICE_FLAG) - spi_qup_fifo_read(controller, xfer); + spi_qup_read(controller, xfer); if (opflags & QUP_OP_OUT_SERVICE_FLAG) - spi_qup_fifo_write(controller, xfer); + spi_qup_write(controller, xfer); } if ((opflags & QUP_OP_MAX_INPUT_DONE_FLAG) || error)