Message ID | E1fAzrt-0007ZJ-F6@debutante (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Tue, Apr 24, 2018 at 6:28 PM, Mark Brown <broonie@kernel.org> wrote: > The patch > > spi: pxa2xx: Allow 64-bit DMA > > has been applied to the spi tree at > > https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git Sorry to bother you again, though I don't see it yet in Linus'. Now we have same patch twice in next and zero in Linus'. What did I miss?
On Wed, May 02, 2018 at 04:04:10PM +0300, Andy Shevchenko wrote: > Sorry to bother you again, though I don't see it yet in Linus'. Now we > have same patch twice in next and zero in Linus'. > What did I miss? Linus will only merge patches when I send him a pull request. I had to duplicate the patch since I stopped using topic branches after Linus got angry about it so I can't just move the topic to a fix.
On Thu, May 3, 2018 at 4:21 AM, Mark Brown <broonie@kernel.org> wrote: > On Wed, May 02, 2018 at 04:04:10PM +0300, Andy Shevchenko wrote: > >> Sorry to bother you again, though I don't see it yet in Linus'. Now we >> have same patch twice in next and zero in Linus'. >> What did I miss? > > Linus will only merge patches when I send him a pull request. Are you going to send one for this rc? > I had to > duplicate the patch since I stopped using topic branches after Linus got > angry about it so I can't just move the topic to a fix. Understood.
On Sat, May 05, 2018 at 01:13:56PM +0300, Andy Shevchenko wrote: > On Thu, May 3, 2018 at 4:21 AM, Mark Brown <broonie@kernel.org> wrote: > > Linus will only merge patches when I send him a pull request. > Are you going to send one for this rc? Probably, I'll certainly send one before the next release. I'm on holiday right now so a bit intermittent.
diff --git a/drivers/spi/spi-pxa2xx.h b/drivers/spi/spi-pxa2xx.h index 513ec6c6e25b..0ae7defd3492 100644 --- a/drivers/spi/spi-pxa2xx.h +++ b/drivers/spi/spi-pxa2xx.h @@ -38,7 +38,7 @@ struct driver_data { /* SSP register addresses */ void __iomem *ioaddr; - u32 ssdr_physical; + phys_addr_t ssdr_physical; /* SSP masks*/ u32 dma_cr1;