@@ -451,17 +451,11 @@ static void fsl_espi_cpu_irq(struct mpc8xxx_spi *mspi, u32 events)
®_base->event)) & SPIE_NF), 1000, 0);
if (!ret) {
dev_err(mspi->dev, "tired waiting for SPIE_NF\n");
-
- /* Clear the SPIE bits */
- mpc8xxx_spi_write_reg(®_base->event, events);
complete(&mspi->done);
return;
}
}
- /* Clear the events */
- mpc8xxx_spi_write_reg(®_base->event, events);
-
mspi->count -= 1;
if (mspi->count) {
u32 word = mspi->get_tx(mspi);
@@ -472,23 +466,26 @@ static void fsl_espi_cpu_irq(struct mpc8xxx_spi *mspi, u32 events)
}
}
-static irqreturn_t fsl_espi_irq(s32 irq, void *context_data)
+static irqreturn_t fsl_espi_irq(int irq, void *context_data)
{
struct mpc8xxx_spi *mspi = context_data;
struct fsl_espi_reg *reg_base = mspi->reg_base;
- irqreturn_t ret = IRQ_NONE;
- u32 events;
+ u32 mask, events;
- /* Get interrupt events(tx/rx) */
+ /* Get interrupt mask and events and check that irq belongs to us */
+ mask = mpc8xxx_spi_read_reg(®_base->mask);
events = mpc8xxx_spi_read_reg(®_base->event);
- if (events)
- ret = IRQ_HANDLED;
+ if (!(mask & events))
+ return IRQ_NONE;
dev_vdbg(mspi->dev, "%s: events %x\n", __func__, events);
fsl_espi_cpu_irq(mspi, events);
- return ret;
+ /* Clear the events */
+ mpc8xxx_spi_write_reg(®_base->event, events);
+
+ return IRQ_HANDLED;
}
#ifdef CONFIG_PM
Improve the ISR frame: - move resetting the event bits to the ISR frame - change type of parameter irq to int - make sure that the event bits match at least one bit in the interrupt mask register Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> --- v2: - rebased --- drivers/spi/spi-fsl-espi.c | 23 ++++++++++------------- 1 file changed, 10 insertions(+), 13 deletions(-)