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[v2,1/8] spi: lantiq: fix: Rx overflow error in full duplex mode

Message ID efb650b0faa49a00788c4e0ca8ef7196bdba851d.1594957019.git.eswara.kota@linux.intel.com
State Accepted
Commit 661ccf2b3f1360be50242726f7c26ced6a9e7d52
Headers show
Series [v2,1/8] spi: lantiq: fix: Rx overflow error in full duplex mode | expand

Commit Message

Dilip Kota July 17, 2020, 6:27 a.m. UTC
In full duplex mode, rx overflow error is observed. To overcome the error,
wait until the complete data got received and proceed further.

Fixes: 17f84b793c01 ("spi: lantiq-ssc: add support for Lantiq SSC SPI controller")
Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com>
---
 drivers/spi/spi-lantiq-ssc.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Mark Brown July 22, 2020, 1:45 p.m. UTC | #1
On Fri, 17 Jul 2020 14:27:50 +0800, Dilip Kota wrote:
> In full duplex mode, rx overflow error is observed. To overcome the error,
> wait until the complete data got received and proceed further.

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/8] spi: lantiq: fix: Rx overflow error in full duplex mode
      commit: 661ccf2b3f1360be50242726f7c26ced6a9e7d52
[2/8] spi: lantiq: Add SMP support
      commit: ddf41bf782d2fb1df605407c7fff1160f488c949
[3/8] spi: lantiq: Move interrupt control register offesets to SoC specific data structure
      commit: 8d19d665e0aca28c4bd8a024241b05f74841a315
[4/8] spi: lantiq: Add support to acknowledge interrupt
      commit: 94eca904cb97f9cfa90e3e558fb73c49d2e42f91
[5/8] spi: lantiq: Add fifo size bit mask in SoC specific data structure
      commit: 8743d2155aed9236202294e293ab13d33b3a7682
[6/8] spi: lantiq: Move interrupt configuration to SoC specific data structure
      commit: 744cd0f212d72758fb094c1d13ec61b27ab6de3f
[7/8] spi: Add bindings for Lightning Mountain SoC
      commit: 956284a304dd7d100730b85d90eac3f472b7d2a0
[8/8] spi: lantiq: Add support to Lightning Mountain SoC
      commit: 040f7f9729785363eb062a36f76467c7b7c9b7c1

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark
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Patch

diff --git a/drivers/spi/spi-lantiq-ssc.c b/drivers/spi/spi-lantiq-ssc.c
index 1fd7ee53d4510..44600fb71c484 100644
--- a/drivers/spi/spi-lantiq-ssc.c
+++ b/drivers/spi/spi-lantiq-ssc.c
@@ -184,6 +184,7 @@  struct lantiq_ssc_spi {
 	unsigned int			tx_fifo_size;
 	unsigned int			rx_fifo_size;
 	unsigned int			base_cs;
+	unsigned int			fdx_tx_level;
 };
 
 static u32 lantiq_ssc_readl(const struct lantiq_ssc_spi *spi, u32 reg)
@@ -481,6 +482,7 @@  static void tx_fifo_write(struct lantiq_ssc_spi *spi)
 	u32 data;
 	unsigned int tx_free = tx_fifo_free(spi);
 
+	spi->fdx_tx_level = 0;
 	while (spi->tx_todo && tx_free) {
 		switch (spi->bits_per_word) {
 		case 2 ... 8:
@@ -509,6 +511,7 @@  static void tx_fifo_write(struct lantiq_ssc_spi *spi)
 
 		lantiq_ssc_writel(spi, data, LTQ_SPI_TB);
 		tx_free--;
+		spi->fdx_tx_level++;
 	}
 }
 
@@ -520,6 +523,13 @@  static void rx_fifo_read_full_duplex(struct lantiq_ssc_spi *spi)
 	u32 data;
 	unsigned int rx_fill = rx_fifo_level(spi);
 
+	/*
+	 * Wait until all expected data to be shifted in.
+	 * Otherwise, rx overrun may occur.
+	 */
+	while (rx_fill != spi->fdx_tx_level)
+		rx_fill = rx_fifo_level(spi);
+
 	while (rx_fill) {
 		data = lantiq_ssc_readl(spi, LTQ_SPI_RB);