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Wed, 22 Mar 2023 18:29:35 -0700 From: Dipen Patel To: , , , , , , , , , , , , , CC: Dipen Patel Subject: [PATCH V4 09/10] hte: handle nvidia,gpio-controller property Date: Wed, 22 Mar 2023 18:29:28 -0700 Message-ID: <20230323012929.10815-10-dipenp@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230323012929.10815-1-dipenp@nvidia.com> References: <20230323012929.10815-1-dipenp@nvidia.com> X-NVConfidentiality: public Precedence: bulk X-Mailing-List: timestamp@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT037:EE_|BY5PR12MB4917:EE_ X-MS-Office365-Filtering-Correlation-Id: e5eb480c-76b6-4f62-dc03-08db2b3e16c9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 5wzd7BbtZKIYfGkWWYtJ0tcCAQC0/Hk4RSKNLUZGQ6YkGNhSxwj0Yk7QaPvhWKXtI/e2xbdOUHbNCrWvUEOW9/hKUMUShceS7z2QHDcUtz9RFFxnyjFHQKV3deiWBScKQQHT6s+P+DIrcUIzwhvc+S97+jiwjmZKfIXTxKRpezCYBnDW8+pU8YaZ0fFzc9WRLcmj3Td6DMGgTjAeSXSmg4A8CYpaJdYk7aVK6x+xYFZCjs6vgoB8yIIBw4KR6NM/vXNfXAq6yUtcAl7NFfa5UjZ5cTIAJwrezovqT6Fe8hXg7hgOBEK4gjGfDL6XOnYaCL2Nd03HomRYSsABWXP5EY2Uz33RWTGXYQooG5oYt6yTMSD/UZsh/wklcX/lkYDVVBd2M9XfEaTqSW7ufuLR+7c6IifXWLVSYzAkcqKuX4PvHDBwN0CrUpDV/V6rbWGNN4ETjc3TzaX7KjQvUy7ZLaIFzr7sVbePZXMcXf+PeGgEzOquhq+8e+uZX542LxXr0Xj61T8tm3NpTqq2K/NS8pu2B/+5g0Eeiujn6hmJ2xKfNSWfpmoVZWodXWmiUnyEpoF4yXg4F5KMAHFv3w1qQPhsX1ggWvCU57Ix0y0vd3Y2zf+rn+6a/r8khCpp50MGrF42qqYyCFiMd5upWcAlkpaSBCa3VWaR57CFtjLQlYHdN9QCsLDUTlIhaqJZEDpP22cfK+dMGc5nMK7cv1O6Y7FCfstxACk/Cg/INm3AQ/YsiGT5KAiEX/N6O2/0MDdgWC5NKYgYPOPXP7p13U0mog== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230025)(4636009)(136003)(346002)(376002)(39860400002)(396003)(451199018)(46966006)(36840700001)(8676002)(70586007)(70206006)(4326008)(36860700001)(8936002)(82740400003)(2616005)(2906002)(110136005)(7636003)(41300700001)(356005)(921005)(86362001)(478600001)(7696005)(5660300002)(7416002)(83380400001)(82310400005)(6666004)(107886003)(336012)(47076005)(426003)(36756003)(26005)(1076003)(40480700001)(316002)(186003)(2101003)(83996005);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Mar 2023 01:29:47.1164 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e5eb480c-76b6-4f62-dc03-08db2b3e16c9 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT037.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4917 The dt binding adds nvidia,gpio-controller property from Tegra234 SoC onwards to simplify code handling gpio chip search. The gpio chip search is needed for the AON GPIO GTE instances to map the hardware timestamp GPIO request (coming from the GPIO framework) to the tegra HTE providers. The patch also adds new gpio chip match function to match from the fwnode instead of the gpio controller label. The addition of the property does not break ABI for the existing Tegra194 code. Signed-off-by: Dipen Patel Reviewed-by: Linus Walleij --- drivers/hte/hte-tegra194.c | 28 +++++++++++++++++++++------- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/drivers/hte/hte-tegra194.c b/drivers/hte/hte-tegra194.c index 945c68c5e476..2c485ff5be22 100644 --- a/drivers/hte/hte-tegra194.c +++ b/drivers/hte/hte-tegra194.c @@ -679,6 +679,11 @@ static int tegra_get_gpiochip_from_name(struct gpio_chip *chip, void *data) return !strcmp(chip->label, data); } +static int tegra_gpiochip_match(struct gpio_chip *chip, void *data) +{ + return chip->fwnode == of_node_to_fwnode(data); +} + static int tegra_hte_probe(struct platform_device *pdev) { int ret; @@ -687,6 +692,7 @@ static int tegra_hte_probe(struct platform_device *pdev) struct device *dev; struct tegra_hte_soc *hte_dev; struct hte_chip *gc; + struct device_node *gpio_ctrl; dev = &pdev->dev; @@ -754,15 +760,23 @@ static int tegra_hte_probe(struct platform_device *pdev) gc->match_from_linedata = tegra_hte_match_from_linedata; if (of_device_is_compatible(dev->of_node, - "nvidia,tegra194-gte-aon")) + "nvidia,tegra194-gte-aon")) { hte_dev->c = gpiochip_find("tegra194-gpio-aon", tegra_get_gpiochip_from_name); - else if (of_device_is_compatible(dev->of_node, - "nvidia,tegra234-gte-aon")) - hte_dev->c = gpiochip_find("tegra234-gpio-aon", - tegra_get_gpiochip_from_name); - else - return -ENODEV; + } else { + gpio_ctrl = of_parse_phandle(dev->of_node, + "nvidia,gpio-controller", + 0); + if (!gpio_ctrl) { + dev_err(dev, + "gpio controller node not found\n"); + return -ENODEV; + } + + hte_dev->c = gpiochip_find(gpio_ctrl, + tegra_gpiochip_match); + of_node_put(gpio_ctrl); + } if (!hte_dev->c) return dev_err_probe(dev, -EPROBE_DEFER,