Message ID | 20191126132648.6917-1-roger.pau@citrix.com (mailing list archive) |
---|---|
Headers | show |
Series | x86/vmx: posted interrupt fixes | expand |
On Tue, Nov 26, 2019 at 02:26:46PM +0100, Roger Pau Monne wrote: > Hello, > > The following series aim to solve the issue reported by Joe Jin related > to posted interrupts. Regarding the release blockers email, and the qualification of this series: - a regression introduced since 4.12 This is not a regression, since AFAICT the posted interrupt code has always been like this. - a severe bug of a 4.13 feature The bug seems to impact people using PCI-passthrough on Intel hardware that supports posted interrupts (aka APICv). In my opinion, we either fix it or disable APICv by default (now it's currently enabled by default). Thanks, Roger.