Message ID | 20200110160404.15573-1-roger.pau@citrix.com (mailing list archive) |
---|---|
Headers | show |
Series | x86: improve assisted tlb flush and use it in guest mode | expand |
On 10.01.2020 17:04, Roger Pau Monne wrote: > Patch #2 is likely the most controversial one, as it changes the > implementation of assisted TLB flushes. I have to admit I haven't been > able to figure out why HVM guest context flushes issued a > flush_tlb_mask, and the commit introducing such behavior doesn't contain > a helpful commit message. A shadow mode thing, maybe? Jan
On Fri, Jan 10, 2020 at 05:08:16PM +0100, Jan Beulich wrote: > On 10.01.2020 17:04, Roger Pau Monne wrote: > > Patch #2 is likely the most controversial one, as it changes the > > implementation of assisted TLB flushes. I have to admit I haven't been > > able to figure out why HVM guest context flushes issued a > > flush_tlb_mask, and the commit introducing such behavior doesn't contain > > a helpful commit message. > > A shadow mode thing, maybe? Hm, I could be wrong, but that flush doesn't seem to make sense for shadow mode either. If VPID/ASID is used, ticking it will drop all the guest caches, and if VPID/ASID not used a vmexit/vmentry will clear the cache. According to my reading of the Intel SDM this applies regardless of whether HAP (EPT) is used or not. The flush done by flush_tlb_mask is in root mode, and hence doesn't affect the guest (non-root) caches when SVM/VTx is used. Roger.