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[83.52.55.163]) by smtp.gmail.com with ESMTPSA id j18sm2355853wrd.56.2021.09.02.09.15.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Sep 2021 09:15:45 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list X-Inumbo-ID: d0586f74-3c3b-45c3-9d4d-5e8b10b51373 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=sender:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Cx9tmtcMe/yqb/L4FxX6s6fgCGjzmE2xzXTNn5n4WRY=; b=mcdkcgUkPmIymlgoHwDrJpvE9KHw9dvSG2MlkuM7+LMu3zkIYpqtCeCGgcISYDoKCb 8696YyJt2CPh12bbX7QpwDA8IAMyJN7taR/RiiyUq4y4j+fSACZ5oqQ08yGPg+QlMR0S hitbbr51iTLrvFSzYtCDWEBhD9WU3oObbn7IgCnxkcpgU8/Bpb/PRbBi6oyJFhSCPB/4 T4eJ4wL0xOuOcg0FizPKZv0AhuncICKZC1qKdxIbn5OpaC/dbV050AWnqohvIXKAkBb9 MuFoocUeCUvdcKKf//7Z32DJC9YmwC2EKSjtLp0AMfq+R5Wwnd7FM6PpEyUZ4hvUxjzc 2tig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :mime-version:content-transfer-encoding; bh=Cx9tmtcMe/yqb/L4FxX6s6fgCGjzmE2xzXTNn5n4WRY=; b=OwocEGUbclqWd/677oejQXsrZXjgc5UQ+9J8GvdslFFo/Vtv6tLZ6c5NUFLE3+hImw ckHmp67mWdqSqLEibxLjf5CCDhO51d08PAkBKWlodtkcCQ0GB2mSPb48nuneKm6vORtt Exhc/64bLOIUgZWlHbwUJNQsQoyHXCnD1uvGCHm6i1fR7kwPPq8D/UXNvw6WDySyzofL NMpBhkoZBmXZKK4KrRw2QcfygjvXixEKdshDkMhzMNhVs2fxd5Imgku2XtmrB+zN+DY5 pnKZnG+GpDtQNF6GUT/uoQUiB7gMfj4sYO/5Lju21+VN7uQHq5gDkuNGGNa9514YvSLl MF9A== X-Gm-Message-State: AOAM532VeWCOR6jst8TMpFBX3Crt5lC8mlUjGzbELNXKEFX7FDceZgT+ vAv9dya/i53k0ZwTNDlAuiY= X-Google-Smtp-Source: ABdhPJwMW19l1RT5uyseQGoPrvV+9UXH/fieGpgiPEuYOlcUopWj6VFIU2AjhhvSZ8tr8ff4GeIa0w== X-Received: by 2002:adf:8144:: with SMTP id 62mr4741623wrm.144.1630599347027; Thu, 02 Sep 2021 09:15:47 -0700 (PDT) Sender: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Bin Meng , Eduardo Habkost , Greg Kurz , haxm-team@intel.com, Kamil Rytarowski , qemu-ppc@nongnu.org, Anthony Perard , Marcel Apfelbaum , Michael Rolnik , qemu-riscv@nongnu.org, Paolo Bonzini , Jiaxun Yang , Thomas Huth , David Hildenbrand , Chris Wulff , Laurent Vivier , Cameron Esfahani , Sunil Muthuswamy , Max Filippov , Taylor Simpson , qemu-s390x@nongnu.org, Richard Henderson , Bastian Koppelmann , Yoshinori Sato , Artyom Tarasenko , Aurelien Jarno , Paul Durrant , Peter Maydell , David Gibson , Alistair Francis , "Edgar E. Iglesias" , Roman Bolshakov , Laurent Vivier , Cornelia Huck , qemu-arm@nongnu.org, Wenchao Wang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , xen-devel@lists.xenproject.org, Marek Vasut , Stefano Stabellini , Aleksandar Rikalo , Mark Cave-Ayland , Colin Xu , Claudio Fontana , Palmer Dabbelt , Stafford Horne , Reinoud Zandijk , kvm@vger.kernel.org Subject: [PATCH v3 00/30] accel: Move has_work() from SysemuCPUOps to AccelOpsClass Date: Thu, 2 Sep 2021 18:15:13 +0200 Message-Id: <20210902161543.417092-1-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Hi, CPU has_work() is a per-accelerator handler. This series - explicit the KVM / WHPX implementations - moves TCG implementations in AccelOpsClass - explicit missing implementations (returning 'false'). Since v2: - Full rewrite, no more RFC. Supersedes: <20210304222323.1954755-1-f4bug@amsat.org> "cpu: Move CPUClass::has_work() to TCGCPUOps" Philippe Mathieu-Daudé (30): accel/tcg: Restrict cpu_handle_halt() to sysemu hw/core: Restrict cpu_has_work() to sysemu hw/core: Un-inline cpu_has_work() sysemu: Introduce AccelOpsClass::has_work() accel/kvm: Implement AccelOpsClass::has_work() accel/whpx: Implement AccelOpsClass::has_work() accel/tcg: Implement AccelOpsClass::has_work() as stub target/alpha: Restrict has_work() handler to sysemu and TCG target/arm: Restrict has_work() handler to sysemu and TCG target/avr: Restrict has_work() handler to sysemu and TCG target/cris: Restrict has_work() handler to sysemu and TCG target/hexagon: Remove unused has_work() handler target/hppa: Restrict has_work() handler to sysemu and TCG target/i386: Restrict has_work() handler to sysemu and TCG target/m68k: Restrict has_work() handler to sysemu and TCG target/microblaze: Restrict has_work() handler to sysemu and TCG target/mips: Restrict has_work() handler to sysemu and TCG target/nios2: Restrict has_work() handler to sysemu and TCG target/openrisc: Restrict has_work() handler to sysemu and TCG target/ppc: Restrict has_work() handler to sysemu and TCG target/ppc: Introduce PowerPCCPUClass::has_work() target/ppc: Simplify has_work() handlers target/riscv: Restrict has_work() handler to sysemu and TCG target/rx: Restrict has_work() handler to sysemu and TCG target/s390x: Restrict has_work() handler to sysemu and TCG target/sh4: Restrict has_work() handler to sysemu and TCG target/sparc: Restrict has_work() handler to sysemu and TCG target/tricore: Restrict has_work() handler to sysemu and TCG target/xtensa: Restrict has_work() handler to sysemu and TCG accel: Add missing AccelOpsClass::has_work() and drop SysemuCPUOps one include/hw/core/cpu.h | 28 +-- include/hw/core/tcg-cpu-ops.h | 4 + include/sysemu/accel-ops.h | 5 + target/ppc/cpu-qom.h | 3 + accel/hvf/hvf-accel-ops.c | 6 + accel/kvm/kvm-accel-ops.c | 6 + accel/qtest/qtest.c | 6 + accel/tcg/cpu-exec.c | 8 +- accel/tcg/tcg-accel-ops.c | 12 ++ accel/xen/xen-all.c | 6 + hw/core/cpu-common.c | 6 - softmmu/cpus.c | 10 +- target/alpha/cpu.c | 4 +- target/arm/cpu.c | 7 +- target/avr/cpu.c | 4 +- target/cris/cpu.c | 4 +- target/hexagon/cpu.c | 6 - target/hppa/cpu.c | 4 +- target/i386/cpu.c | 6 - target/i386/hax/hax-accel-ops.c | 6 + target/i386/nvmm/nvmm-accel-ops.c | 6 + target/i386/tcg/tcg-cpu.c | 8 +- target/i386/whpx/whpx-accel-ops.c | 6 + target/m68k/cpu.c | 4 +- target/microblaze/cpu.c | 10 +- target/mips/cpu.c | 4 +- target/nios2/cpu.c | 4 +- target/openrisc/cpu.c | 4 +- target/ppc/cpu_init.c | 324 +++++++++++++++--------------- target/riscv/cpu.c | 8 +- target/rx/cpu.c | 4 +- target/s390x/cpu.c | 4 +- target/sh4/cpu.c | 7 +- target/sparc/cpu.c | 4 +- target/tricore/cpu.c | 6 +- target/xtensa/cpu.c | 16 +- 36 files changed, 321 insertions(+), 239 deletions(-)