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[0/3] x86: Fix racy accesses to MSI-X Control register

Message ID 20221110165935.106376-1-dvrabel@amazon.co.uk (mailing list archive)
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Series x86: Fix racy accesses to MSI-X Control register | expand

Message

David Vrabel Nov. 10, 2022, 4:59 p.m. UTC 
The main patch in this series is 3/3 with some preparatory patches to
simplify the implementation. To summarize:

    Concurrent access the the MSI-X control register are not serialized
    with a suitable lock. For example, in msix_capability_init() access
    use the pcidevs_lock() but some calls to msi_set_mask_bit() use the
    interrupt descriptor lock.
    
    This can lead to MSI-X being incorrectly disabled and subsequent
    failures due to msix_memory_decoded() calls that check for MSI-X being
    enabled.

David