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From: "Andrei Cherechesu (OSS)" To: xen-devel@lists.xenproject.org Cc: michal.orzel@amd.com, sstabellini@kernel.org, Bertrand.Marquis@arm.com, julien@xen.org, Volodymyr_Babchuk@epam.com, rahul.singh@arm.com, Andrei Cherechesu Subject: [PATCH v3 0/2] Fix ARM Generic Timer interrupt parsing Date: Mon, 13 Mar 2023 15:08:01 +0200 Message-Id: <20230313130803.3499098-1-andrei.cherechesu@oss.nxp.com> X-Mailer: git-send-email 2.35.1 X-ClientProxiedBy: AM0PR03CA0001.eurprd03.prod.outlook.com (2603:10a6:208:14::14) To VI1PR04MB5056.eurprd04.prod.outlook.com (2603:10a6:803:5a::13) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: VI1PR04MB5056:EE_|DU2PR04MB8520:EE_ X-MS-Office365-Filtering-Correlation-Id: 268d79e0-d8a8-48fd-babe-08db23c40491 X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: AoK49Kh1Xd34kmOweLjW/vvpZfhT/pql7hGKwHuIxZUMr5NYFAHNLFyIuO92MJSTbmUZqjZcgpbQkPbsqnVVPYhG5ZZTBl5jushnqjEhTH60jHvQnP+pfsXcLzRlrKWj68CPDiN0fUMq4Rl0aAU8bX1q/NLNJh3kMuJEPhSZdakCpsGQpd7zwBIcSkBxuIU4ESwggRY09BV7lRZ8A+V9ZzVb6/fSGGRd+ZrAeUnf+sc9k6AQh+ojHZe9tgzY0tZmIMGkuW/yQOsNbz5U22+ZalGe73LMyCJkEQuIOUX5j28RBHzTUDUKexCIqoC58KffTjAtceqHDBRnb2Q9IQwPkkkpEPzDjmVCz7y2IYlBm+7m1O47jB0/NfvySFsoLTzygjNmLwxmxezXtfip2Tz0A5coIzkXS4QbAOL/+Iamdl0IfiQHKNHnrsk+FSn9rw7ni99C6wu9mlbSDDXPtY8PUS48+MjodeLg4umdaubNITGPeodUhdFWRum7/VifcXA0zC+eiMhcowU96mWAf0fRT2xRa1ZU5JDHXoH76iSSNi+hXPHPWIR9nQ8j9b05jEsPZouWYrWaE7DxIFPA8yZ5cbnCORVPA37l+S0mFvmxng7XmBe1XoZzxVNxbmqx9Ro8xAwODuI9WJrT173kNyvX7ixsE1MCTw/zfr39OXTUQKQ35ZSM+BePmamZ+FbTIunfDrtOXR8cepnAGvbYGNR293WcShaSRk8uWU/4eqhPWqg= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:VI1PR04MB5056.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230025)(4636009)(346002)(376002)(396003)(136003)(39860400002)(366004)(451199018)(2616005)(186003)(6512007)(26005)(1076003)(6506007)(83380400001)(8936002)(6666004)(38100700002)(5660300002)(6486002)(66556008)(66476007)(8676002)(4326008)(52116002)(38350700002)(6916009)(66946007)(41300700001)(2906002)(478600001)(316002)(86362001)(41533002);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: YW8+r116Mt6pdAcZU1YOtTW4Q1qTvSa8RdNnZcl7xlsh18NIDYHG4eXYFIlgINNNJTbXHyGIrU8EL/yBYw+VqqqCG7FjEPN0JPM66kNsPwPsKRhlQtZrC5LLHq0fprJ0pdrJu7VH3XQGmuXgG+yoMZm4pZOl+4NMURFnNfYff9DHI3kikEUM7BOl2p35an3F/4CfaS1oNbbEMiHiTftKNYOJTXdl6XvjgHDYOasw4ma0mwBgpmZNuG19FvutttnZc/hvPn00tvNqK4EkWIxdgJkCDlUCIKQtfL/6Sp2Cu2OXRlMPZDUa0fAkqT9WuSwmMWR6A4rynCRsW9OX1Ns51+lkvifvM6TIMCnn0O64cPqTWar/tb3RJyLGbqflOzjbFiUw+GxQtZYIqBfQ47IuSGsW9vzB/vWYK9uKbFlbJPze8K4+fBGgN41LQpW4Oy6HF+LfOi8DZDH8/tZza7JdIYwwUrawdmOk6EiE/OLKBm8YlgaZJEOkWsHt2l0j/SsYi8PUmjjLWZRXlsnbNKUMKwdmck2yVT8vUn86wH83wOoZ1mbBFnEwtcdagSKZuqvT4dhjgJqUUs6AlKL0rxZ3S429H4hfO9yBbwm+F3RuTFFwHDF7sUQEa67v0LsUzuoZ5AIMPmphrubHAvGujsYvAFjYn0Q8AHCnlbtWwYeC8ttouRHpVlhIrp3RteW+oC6VG4hK/EsWMWmCjzarRXgB37/XCGROT1RRvB8IUSDVWs6awuq1XFA/dGS9ROIEXuxWJ7lf9DF5KSFXiO0NKA6+A0r1bul6UE6Ee/FoSBntpHZub/qfD2x51qkH1Kdy/rv/vT8QcQsoeeUuxVoie8FLYIL6e4OkKN6db9tW8Tozeo+r6wxl1hK65DwMURsXGa06KRuXAyuBMGihqH4JC1SXKw5Y7PHwUDjHHybj+DcfK3CwHU5gZ8dzKUYNvVYjBA3ldWfus74AhSgreofgKZsVGoJD/pkcf1gMNds2fjuDH/cHpIcdK+xrelvlMV5Q8D4lXtBZkEByaA2FDo3b4lEJkH85elKhRaTDE5+QTBZM06Ls0ZZcLcGjuy0alA49J/h84o/0mgtf5my99DaNv2e+Us5g//hHj/At+ES3H84gEqzhVw1OQoICcHEhnJwi9BNC5EucmTU6RaCgQhqZvHy1GHHDp2I+ygDAMWriFLiZ6gziOSFxuGoLctqKtfd8JpqCNt03dxNwxBNlYti5Kp62qTrn6oH4Ooq3JLelEW49dEfLV/rdfZJ+L1vLlTguUuNyNqG0nToc8QGkd9NhRcSx63BIXuNFq/lCA9b/7cclmAlIF3LxMGQzqgtyUs3WWF1JoBAtsQsje8t97PVd9jB96gQ1Qi7zhzrSznyqV10jpSdrCwuCTH7kC1f6o4wDxDOUef3o71DdGlR8+Ncl4yvdg6mrV4TjqQqqANZ+hDMGFMxvoKqvYROpL6j+SmAIB5wdMmEI1KpYkaabaQ/Ht+d93941XicnEyWTz/cBpuIFD4fwcWMs2wFQBPvbzzCDsbUChisQtGiIUlNVuc81bZu8MpvH5qvft9Hnnl66jNblpzrIC0ZkQ+12O7eEAqIk2r6AX2oKq2DVx4vtb/MWMjmthA== X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 268d79e0-d8a8-48fd-babe-08db23c40491 X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB5056.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Mar 2023 13:08:20.2309 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: VLxA04uM3c4FljvPpUtxa6v+W6Md7N+Ezed4ct/H664pU2ZwKzMcpIFeDr2Zx8LsrcdCXVuihFMlJ9tMn6rwG53/UL0dHjQG0qBdJUB/bS8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU2PR04MB8520 From: Andrei Cherechesu This 2-patch series fixes the parsing of the ARM Generic Timer interrupts from the device tree. If the generic timer interrupts order in the DT was different than the expected order in Xen code, these interrupts would no longer be correctly parsed and registered by Xen, and would result in boot failure. This method with using "interrupt-names" for the generic timer interrupts instead of having them hardcoded in the DTB in a specific order is the newer approach already implemented in Linux. Xen did not have the necessary code for this approach, and it has been implemented by the means of this patch series. Functionality should remain the same if "interrupt-names" is not present in the Generic Timer DTB node of the platform, but the interrupts should then still be present in the expected "sec-phys", "phys", "virt", "hyp-phys", "hyp-virt" order. If "interrupt-names" is present, now it is also correctly handled. Changes v2->v3: - Fixed 2nd commit message to mention that treating 0 as a valid return for platform_get_irq would lead to a BUG() when trying to reserve vIRQ being SGI instead of "during vgic_reserve_virq()". - Moved timer_irq_names[] in the init_dt_xen_time() function as it's only used there, and marked it as __initconst and also as const ptr. Changes v1->v2: - Rebased on latest staging as of 2023-03-09 - Fixed coding style of comment added in 2nd commit - Added to 2nd commit message explanation as to why 0 should be treated as an error case for platform_get_irq Andrei Cherechesu (2): arch/arm: irq: Add platform_get_irq_byname() implementation arch/arm: time: Add support for parsing interrupts by names xen/arch/arm/include/asm/irq.h | 2 ++ xen/arch/arm/include/asm/time.h | 3 ++- xen/arch/arm/irq.c | 14 +++++++++++ xen/arch/arm/time.c | 26 +++++++++++++++++--- xen/drivers/passthrough/arm/smmu-v3.c | 35 +++++---------------------- 5 files changed, 46 insertions(+), 34 deletions(-)