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pr=C From: Ayan Kumar Halder To: CC: , , , , , , , , , , Ayan Kumar Halder Subject: [XEN v5 00/10] Add support for 32-bit physical address Date: Thu, 13 Apr 2023 18:37:25 +0100 Message-ID: <20230413173735.48387-1-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT107:EE_|DM4PR12MB5793:EE_ X-MS-Office365-Filtering-Correlation-Id: 6c3edd7f-2df5-48e5-c423-08db3c45c81d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 0tmH1vaMOZyUTJXOaX3BB4fCLIfJpCgCq4CHZxGbq6xpmI6th4eCFP4sRqwkDmDY4pSFRkrnuSTofX09LHm3CjcLY/sjsWyvjtjKxjquXa54iwWWWm3382Lq5pjlJWwWk3MOJLOiXZy8UDQdlac7xPJ51f+xHGkI1Pe4FYIf9f4L2fudMqv147iy20IIf7mv+/IThLDdUauof4y6ftRDKVm8i+o1bab/c5N00ondUi74QV/vbVZSEb78jmLKhh5ueQE5TJHnde4RwIBnp/pq0EO+DzdIeH5L1oGGngBtK+yCfENC4PwXeVTZ9rNbftjxt6jtC/Ic7Ggbt8DjfVd9poIegISERIQB7BV9ADQFPble7WbHbGbBCbbiym6S/grYKHTZkGfzsetX6FDn21nV4diVXuK+7nNT42sZosEbDYIP3x8OPHKVFcVRZSleWIGKGV3XYE3gB41KRQd2DM1/WSHTYJXONdcCXDw3FUIeqq7FaCLM9C7zPPssndAdH6gaYyPpFx+k8NVepaf8B7oqbrYVQL7U9l9cQxkbc/AZzBpUqy1ibMD1VajafiSjSVwZZ9VTseul1ykNfn4kNLfx4Loq/PTjv6qVbwlF7YKsewt6LoioMG62pBtunocJPX1iYWJhEDF0QtocI84e+86s93McYR+GLnXt02YACKzB7A5y6IghCHJZQjiWMxjCI1wEcfDfiqIMZ7lqxJxNAgvDLQEDPzNO/Adl6bZkb2jSlB7LU2+ytiATotBBfMglUmsuZay/WdgnupXU0oL4tNP8GQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(376002)(39860400002)(136003)(346002)(396003)(451199021)(40470700004)(36840700001)(46966006)(40460700003)(316002)(41300700001)(81166007)(1076003)(26005)(966005)(186003)(86362001)(6666004)(47076005)(356005)(36860700001)(2616005)(82310400005)(426003)(336012)(83380400001)(82740400003)(6916009)(4326008)(54906003)(36756003)(40480700001)(70206006)(70586007)(8676002)(8936002)(5660300002)(2906002)(7416002)(103116003)(478600001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Apr 2023 17:37:41.0401 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6c3edd7f-2df5-48e5-c423-08db3c45c81d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT107.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5793 Hi All, Please have a look at https://lists.xenproject.org/archives/html/xen-devel/2022-11/msg01465.html for the context. The benefits of using 32 bit physical addresses are as follows :- 1. It helps to use Xen on platforms (for eg R52) which supports 32-bit physical addresses and has no support for large physical address extension. On 32-bit MPU systems which supports flat-mapping (for eg R52), it helps to translate 32 bit VA into 32 bit PA. 2. It also helps in code optimization when the underlying platform does not use large physical address extension. The following points are to be noted :- 1. Device tree always use uint64_t for address and size. The caller needs to translate between uint64_t and uint32_t (when 32 bit physical addressing is used). 2. Currently, we have enabled this option for Arm_32 as the MMU for Arm_64 uses 48-bit physical addressing. 3. https://lists.xenproject.org/archives/html/xen-devel/2022-12/msg00117.html has been added to this series. Changes from : v1 - 1. Reordered the patches such that the first three patches fixes issues in the existing codebase. These can be applied independent of the remaining patches in this serie. 2. Dropped translate_dt_address_size() for the address/size translation between paddr_t and u64 (as parsed from the device tree). Also, dropped the check for truncation (while converting u64 to paddr_t). Instead now we have modified device_tree_get_reg() and typecasted the return for dt_read_number(), to obtain paddr_t. Also, introduced wrappers for fdt_get_mem_rsv() and dt_device_get_address() for the same purpose. These can be found in patch 4/11 and patch 6/11. 3. Split "Other adaptations required to support 32bit paddr" into the following individual patches for each adaptation : xen/arm: smmu: Use writeq_relaxed_non_atomic() for writing to SMMU_CBn_TTBR0 xen/arm: guest_walk: LPAE specific bits should be enclosed within "ifndef CONFIG_ARM_PA_32" 4. Introduced "xen/arm: p2m: Enable support for 32bit IPA". v2 - 1. Dropped patches 1/11, 2/11 and 3/11 from the v2 as it has already been committed (except 2/11 - "[XEN v5] xen/arm: Use the correct format specifier" which is waiting to be committed). 2. Introduced a new patch "xen/drivers: ns16550: Use paddr_t for io_base/io_size". v3 - 1. Combined the patches from https://lists.xenproject.org/archives/html/xen-devel/2023-02/msg00656.html in this series. v4 - 1. Dropped "xen/drivers: ns16550: Use paddr_t for io_base/io_size" from the patch series. As Jan (jbeulich@suse.com) had pointed out in https://lore.kernel.org/xen-devel/20230321140357.24094-5-ayan.kumar.halder@amd.com/, ns16550 driver requires some prior cleanup. Also, ns16550 can be ignored for now for the 32-bit paddr support (which is mainly targeted for Arm). I will send out separate patches to fix this once the current serie is committed (or in ready to commit state). I hope that is fine with Jan ? 2. Introduced "xen/arm: domain_build: Check if the address fits the range of physical address". 3. "xen/arm: Use the correct format specifier" has been committed in v4. Ayan Kumar Halder (10): xen/arm: domain_build: Track unallocated pages using the frame number xen/arm: Typecast the DT values into paddr_t xen/arm: Introduce a wrapper for dt_device_get_address() to handle paddr_t xen/arm: smmu: Use writeq_relaxed_non_atomic() for writing to SMMU_CBn_TTBR0 xen/arm: Introduce choice to enable 64/32 bit physical addressing xen/arm: guest_walk: LPAE specific bits should be enclosed within "ifndef CONFIG_PHYS_ADDR_T_32" xen/arm: Restrict zeroeth_table_offset for ARM_64 xen/arm: domain_build: Check if the address fits the range of physical address xen/arm: p2m: Use the pa_range_info table to support ARM_32 and ARM_64 xen/arm: p2m: Enable support for 32bit IPA for ARM_32 xen/arch/Kconfig | 3 + xen/arch/arm/Kconfig | 37 +++++++++++- xen/arch/arm/bootfdt.c | 48 ++++++++++++---- xen/arch/arm/domain_build.c | 67 +++++++++++++++------- xen/arch/arm/gic-v2.c | 10 ++-- xen/arch/arm/gic-v3-its.c | 4 +- xen/arch/arm/gic-v3.c | 10 ++-- xen/arch/arm/guest_walk.c | 2 + xen/arch/arm/include/asm/lpae.h | 4 ++ xen/arch/arm/include/asm/p2m.h | 8 +-- xen/arch/arm/include/asm/page-bits.h | 6 +- xen/arch/arm/include/asm/setup.h | 4 +- xen/arch/arm/include/asm/types.h | 6 ++ xen/arch/arm/mm.c | 12 ++-- xen/arch/arm/p2m.c | 35 +++++------ xen/arch/arm/pci/pci-host-common.c | 6 +- xen/arch/arm/platforms/brcm-raspberry-pi.c | 2 +- xen/arch/arm/platforms/brcm.c | 6 +- xen/arch/arm/platforms/exynos5.c | 32 +++++------ xen/arch/arm/platforms/sunxi.c | 2 +- xen/arch/arm/platforms/xgene-storm.c | 2 +- xen/arch/arm/setup.c | 18 +++--- xen/arch/arm/smpboot.c | 2 +- xen/common/device_tree.c | 35 +++++++++++ xen/drivers/char/cadence-uart.c | 4 +- xen/drivers/char/exynos4210-uart.c | 4 +- xen/drivers/char/imx-lpuart.c | 4 +- xen/drivers/char/meson-uart.c | 4 +- xen/drivers/char/mvebu-uart.c | 4 +- xen/drivers/char/omap-uart.c | 4 +- xen/drivers/char/pl011.c | 6 +- xen/drivers/char/scif-uart.c | 4 +- xen/drivers/passthrough/arm/ipmmu-vmsa.c | 8 +-- xen/drivers/passthrough/arm/smmu-v3.c | 2 +- xen/drivers/passthrough/arm/smmu.c | 23 ++++---- xen/include/xen/device_tree.h | 36 ++++++++++++ xen/include/xen/libfdt/libfdt-xen.h | 55 ++++++++++++++++++ 37 files changed, 369 insertions(+), 150 deletions(-) create mode 100644 xen/include/xen/libfdt/libfdt-xen.h