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[v3,0/4] x86: RSBA and RRSBA handling

Message ID 20230612161306.2739572-1-andrew.cooper3@citrix.com (mailing list archive)
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Series x86: RSBA and RRSBA handling | expand

Message

Andrew Cooper June 12, 2023, 4:13 p.m. UTC
This series deals with the hanlding of the RSBA and RRSBA bits across all
parts and all mistakes encountered in various microcode versions.

There are only minor changes from v2.  See patches for details.

Andrew Cooper (4):
  x86/spec-ctrl: Use a taint for CET without MSR_SPEC_CTRL
  x86/spec-ctrl: Rename retpoline_safe() to retpoline_calculations()
  x86/spec-ctrl: Fix up the RSBA/RRSBA bits as appropriate
  x86/cpu-policy: Derive RSBA/RRSBA for guest policies

 xen/arch/x86/cpu-policy.c                   |  39 ++++++
 xen/arch/x86/include/asm/cpufeature.h       |   1 +
 xen/arch/x86/spec_ctrl.c                    | 142 +++++++++++++++++---
 xen/common/kernel.c                         |   2 +-
 xen/include/public/arch-x86/cpufeatureset.h |   4 +-
 xen/tools/gen-cpuid.py                      |   5 +-
 6 files changed, 170 insertions(+), 23 deletions(-)