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[v4,0/3] x86/pci: reduce PCI accesses

Message ID 20250311120652.61366-1-roger.pau@citrix.com (mailing list archive)
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Series x86/pci: reduce PCI accesses | expand

Message

Roger Pau Monné March 11, 2025, 12:06 p.m. UTC 
Hello,

Patches 1 and 2 are new bugfixes in this version.  Patch 3 is still
mostly as v3, just with the extra logic to ensure vmx_pi_update_irte()
correctness.

Thanks, Roger.

Roger Pau Monne (3):
  x86/vmx: fix posted interrupts usage of msi_desc->msg field
  x86/hvm: check return code of hvm_pi_update_irte when binding
  x86/iommu: avoid MSI address and data writes if IRT index hasn't
    changed

 xen/arch/x86/hpet.c                      |  6 +++++-
 xen/arch/x86/hvm/vmx/vmx.c               | 20 +++++++++++++++++++-
 xen/arch/x86/include/asm/msi.h           |  2 +-
 xen/arch/x86/msi.c                       | 11 ++++++-----
 xen/drivers/passthrough/amd/iommu_intr.c |  4 ++--
 xen/drivers/passthrough/vtd/intremap.c   |  4 +++-
 xen/drivers/passthrough/x86/hvm.c        | 10 +++++++++-
 xen/include/xen/iommu.h                  |  6 ++++++
 8 files changed, 51 insertions(+), 12 deletions(-)