From patchwork Mon Mar 25 13:29:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pu Wen X-Patchwork-Id: 10869167 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4CEBD1390 for ; Mon, 25 Mar 2019 13:43:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3965E28111 for ; Mon, 25 Mar 2019 13:43:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2D76D285E0; Mon, 25 Mar 2019 13:43:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7814628111 for ; Mon, 25 Mar 2019 13:43:22 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pr4-0004wH-Q7; Mon, 25 Mar 2019 13:41:34 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1h8Pr3-0004vy-Po for xen-devel@lists.xenproject.org; Mon, 25 Mar 2019 13:41:33 +0000 X-Inumbo-ID: aff1bbb0-4f03-11e9-a763-177d6c3390d9 Received: from spam1.hygon.cn (unknown [110.188.70.11]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id aff1bbb0-4f03-11e9-a763-177d6c3390d9; Mon, 25 Mar 2019 13:41:28 +0000 (UTC) Received: from MK-FE.hygon.cn ([172.23.18.61]) by spam1.hygon.cn with ESMTP id x2PDToXS013292; Mon, 25 Mar 2019 21:29:50 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from cncheex01.Hygon.cn ([172.23.18.10]) by MK-FE.hygon.cn with ESMTP id x2PDThEf001428; Mon, 25 Mar 2019 21:29:43 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from pw-vbox.hygon.cn (172.23.18.44) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1466.3; Mon, 25 Mar 2019 21:29:47 +0800 From: Pu Wen To: Date: Mon, 25 Mar 2019 21:29:30 +0800 Message-ID: X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex01.Hygon.cn (172.23.18.10) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam1.hygon.cn x2PDToXS013292 X-DNSRBL: Subject: [Xen-devel] [PATCH v3 00/14] Add support for Hygon Dhyana Family 18h processor X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Wei Liu , Suravee Suthikulpanit , Pu Wen , Ian Jackson , Jan Beulich , Andrew Cooper , Boris Ostrovsky , Brian Woods , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP As a new x86 CPU vendor, Chengdu Haiguang IC Design Co., Ltd (Hygon) is a joint venture between AMD and Haiguang Information Technology Co., Ltd., aims at providing high performance x86 processors for China server market. The first generation Hygon processor(Dhyana) originates from AMD technology and shares most of the architecture with AMD's family 17h, but with different CPU vendor ID("HygonGenuine") and family series number 18h (Hygon negotiated with AMD to make sure that only Hygon will use family 18h). To enable support of Xen to Hygon Dhyana CPU, add a new vendor type (X86_VENDOR_HYGON, with value of 5), and share most of the code with AMD family 17h. The MSRs and CPUIDs which are used by this patch series are all defined in this PPR[1]. This patch series have been applied and tested successfully on Hygon Dhyana processor, also been tested on AMD EPYC (family 17h) processor. It works fine and makes no harm to the existing code. Reference: [1] https://www.amd.com/system/files/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf v2->v3: - Rebased on 4.13-unstable and tested against it. - Simplify code of hygon.c by re-using early_init_amd(). - Return false in the function probe_cpuid_faulting(). - Adjust code for calculating phys_proc_id for Hygon. - Abstract common function _vpmu_init() and add hygon_vpmu_init(). - Refine some comments and descriptions. - Add Acked-by from Jan Beulich for x86/cpu/mtrr, x86/cpu/mce, x86/spec_ctrl, x86/apic, x86/acpi, x86/iommu, x86/pv, x86/domain, x86/domctl and x86/cpuid. v1->v2: - Rebased on 4.12.0-rc3 and tested against it. - Move opt_cpuid_mask_l7s0_(eax/ebx) to common.c. - Insert Hygon cases after AMD ones instead of above. - Remove (rd/wr)msr_hygon_safe and use (rd/wr)msr_safe instead. - Remove wrmsr_hygon and use wrmsrl instead. - Remove the unnecessary change to xstate. - Refine some codes and comments. - Add Acked-by from Jan Beulich for x86/traps. - Add Acked-by from Wei Liu for tools/libxc. Pu Wen (14): x86/cpu: Create Hygon Dhyana architecture support file x86/cpu/mtrr: Add Hygon Dhyana support to get TOP_MEM2 x86/cpu/vpmu: Add Hygon Dhyana and AMD Zen support for vPMU x86/cpu/mce: Add Hygon Dhyana support to the MCA infrastructure x86/spec_ctrl: Add Hygon Dhyana to the respective mitigation machinery x86/apic: Add Hygon Dhyana support x86/acpi: Add Hygon Dhyana support x86/iommu: Add Hygon Dhyana support x86/pv: Add Hygon Dhyana support to emulate MSRs access x86/domain: Add Hygon Dhyana support x86/domctl: Add Hygon Dhyana support x86/traps: Add Hygon Dhyana support x86/cpuid: Add Hygon Dhyana support tools/libxc: Add Hygon Dhyana support tools/libxc/xc_cpuid_x86.c | 16 ++++-- xen/arch/x86/acpi/cpu_idle.c | 3 +- xen/arch/x86/acpi/cpufreq/cpufreq.c | 8 +-- xen/arch/x86/acpi/cpufreq/powernow.c | 3 +- xen/arch/x86/apic.c | 5 ++ xen/arch/x86/cpu/Makefile | 1 + xen/arch/x86/cpu/amd.c | 7 +-- xen/arch/x86/cpu/common.c | 12 ++++- xen/arch/x86/cpu/cpu.h | 4 ++ xen/arch/x86/cpu/hygon.c | 95 ++++++++++++++++++++++++++++++++++ xen/arch/x86/cpu/mcheck/amd_nonfatal.c | 5 +- xen/arch/x86/cpu/mcheck/mce.c | 6 ++- xen/arch/x86/cpu/mcheck/mce_amd.c | 5 +- xen/arch/x86/cpu/mcheck/non-fatal.c | 3 +- xen/arch/x86/cpu/mcheck/vmce.c | 2 + xen/arch/x86/cpu/mtrr/generic.c | 5 +- xen/arch/x86/cpu/vpmu.c | 5 ++ xen/arch/x86/cpu/vpmu_amd.c | 57 ++++++++++++++------ xen/arch/x86/cpuid.c | 10 ++-- xen/arch/x86/dom0_build.c | 3 +- xen/arch/x86/domain.c | 9 ++-- xen/arch/x86/domctl.c | 13 +++-- xen/arch/x86/pv/emul-priv-op.c | 19 ++++--- xen/arch/x86/spec_ctrl.c | 6 ++- xen/arch/x86/traps.c | 3 ++ xen/include/asm-x86/iommu.h | 1 + xen/include/asm-x86/vpmu.h | 1 + xen/include/asm-x86/x86-vendors.h | 3 +- 28 files changed, 250 insertions(+), 60 deletions(-) create mode 100644 xen/arch/x86/cpu/hygon.c