mbox series

[XEN,v4,0/9] x86: address some violations of MISRA C Rule 16.3

Message ID cover.1721050709.git.federico.serafini@bugseng.com (mailing list archive)
Headers show
Series x86: address some violations of MISRA C Rule 16.3 | expand

Message

Federico Serafini July 15, 2024, 4:47 p.m. UTC
This patch series fixes a missing escape in a deviation and addresses some
violations.

Federico Serafini (9):
  automation/eclair: fix deviation of MISRA C Rule 16.3
  x86/cpuid: use fallthrough pseudo keyword
  x86/domctl: address a violation of MISRA C Rule 16.3
  x86/vpmu: address violations of MISRA C Rule 16.3
  x86/traps: address violations of MISRA C Rule 16.3
  x86/mce: address violations of MISRA C Rule 16.3
  x86/hvm: address violations of MISRA C Rule 16.3
  x86/mm: add defensive return
  x86/mpparse: address a violation of MISRA C Rule 16.3

 automation/eclair_analysis/ECLAIR/deviations.ecl |  2 +-
 xen/arch/x86/cpu/mcheck/mce_amd.c                |  1 +
 xen/arch/x86/cpu/mcheck/mce_intel.c              |  2 ++
 xen/arch/x86/cpu/vpmu.c                          |  3 +++
 xen/arch/x86/cpu/vpmu_intel.c                    |  2 ++
 xen/arch/x86/cpuid.c                             |  3 +--
 xen/arch/x86/domctl.c                            |  1 +
 xen/arch/x86/hvm/emulate.c                       | 10 ++++++----
 xen/arch/x86/hvm/hvm.c                           |  5 +++++
 xen/arch/x86/hvm/hypercall.c                     |  2 +-
 xen/arch/x86/hvm/irq.c                           |  1 +
 xen/arch/x86/hvm/pmtimer.c                       |  1 +
 xen/arch/x86/hvm/svm/svm.c                       |  2 ++
 xen/arch/x86/hvm/vlapic.c                        |  1 +
 xen/arch/x86/hvm/vmx/vmcs.c                      |  2 ++
 xen/arch/x86/hvm/vmx/vmx.c                       |  3 ++-
 xen/arch/x86/hvm/vmx/vvmx.c                      |  1 +
 xen/arch/x86/hvm/vpic.c                          |  1 +
 xen/arch/x86/hvm/vpt.c                           |  3 +--
 xen/arch/x86/mm.c                                |  1 +
 xen/arch/x86/mpparse.c                           |  1 +
 xen/arch/x86/traps.c                             |  3 +++
 22 files changed, 40 insertions(+), 11 deletions(-)

Comments

Jan Beulich July 16, 2024, 6:59 a.m. UTC | #1
On 15.07.2024 18:48, Federico Serafini wrote:
> This patch series fixes a missing escape in a deviation and addresses some
> violations.
> 
> Federico Serafini (9):
>   automation/eclair: fix deviation of MISRA C Rule 16.3
>   x86/cpuid: use fallthrough pseudo keyword
>   x86/domctl: address a violation of MISRA C Rule 16.3
>   x86/vpmu: address violations of MISRA C Rule 16.3
>   x86/traps: address violations of MISRA C Rule 16.3
>   x86/mce: address violations of MISRA C Rule 16.3
>   x86/hvm: address violations of MISRA C Rule 16.3
>   x86/mm: add defensive return
>   x86/mpparse: address a violation of MISRA C Rule 16.3

And what exactly was this resend about? Even sent as reply to the original
submission, rather than as a plain new thread, thus resulting in everything
being mixed up into a single thread?

Jan
Federico Serafini July 16, 2024, 7:08 a.m. UTC | #2
On 16/07/24 08:59, Jan Beulich wrote:
> On 15.07.2024 18:48, Federico Serafini wrote:
>> This patch series fixes a missing escape in a deviation and addresses some
>> violations.
>>
>> Federico Serafini (9):
>>    automation/eclair: fix deviation of MISRA C Rule 16.3
>>    x86/cpuid: use fallthrough pseudo keyword
>>    x86/domctl: address a violation of MISRA C Rule 16.3
>>    x86/vpmu: address violations of MISRA C Rule 16.3
>>    x86/traps: address violations of MISRA C Rule 16.3
>>    x86/mce: address violations of MISRA C Rule 16.3
>>    x86/hvm: address violations of MISRA C Rule 16.3
>>    x86/mm: add defensive return
>>    x86/mpparse: address a violation of MISRA C Rule 16.3
> 
> And what exactly was this resend about? Even sent as reply to the original
> submission, rather than as a plain new thread, thus resulting in everything
> being mixed up into a single thread?

I'm sorry I forgot to add the maintainers in the first patch series,
so I resent it.