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mx.microsoft.com 1;spf=pass smtp.mailfrom=suse.com;dmarc=pass action=none header.from=suse.com;dkim=pass header.d=suse.com;arc=none Received: from BY5PR18MB3394.namprd18.prod.outlook.com (10.255.139.95) by BY5PR18MB3297.namprd18.prod.outlook.com (10.255.163.221) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2115.10; Thu, 25 Jul 2019 13:33:02 +0000 Received: from BY5PR18MB3394.namprd18.prod.outlook.com ([fe80::a4f0:4f46:c076:f74b]) by BY5PR18MB3394.namprd18.prod.outlook.com ([fe80::a4f0:4f46:c076:f74b%7]) with mapi id 15.20.2115.005; Thu, 25 Jul 2019 13:33:02 +0000 From: Jan Beulich To: "xen-devel@lists.xenproject.org" Thread-Topic: [PATCH v4 10/12] AMD/IOMMU: correct IRTE updating Thread-Index: AQHVQu17aVBEsWEaZU+c1whcO45+lA== Date: Thu, 25 Jul 2019 13:33:02 +0000 Message-ID: <0ca33ff2-6a66-fce1-1b62-fb30394398bf@suse.com> References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: LO2P265CA0040.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:61::28) To BY5PR18MB3394.namprd18.prod.outlook.com (2603:10b6:a03:194::31) authentication-results: spf=none (sender IP is ) smtp.mailfrom=JBeulich@suse.com; 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DIR:OUT; SFP:1102; SCL:1; SRVR:BY5PR18MB3297; H:BY5PR18MB3394.namprd18.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: suse.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: pb5p+OaE7wQ0BEJ70uWGiiqeiFxptqqoNL/vVTh/GxxRsw6gE0ay21943YDN7tX0dJw7HuhBBAAxVDVLtcpmisHgZOh9zLPONh701sxIjeWNNrNVNyr/3x4W8Um/RhGT9B2qtP26wnTNXyBnp+9UurqkymRfKPGAT0x+2lqyHcxXGcEUGMRek+uV8WI3c+ZndJ3t/s6x4Bz5iXhaPeuvDJJi2f8VwXgiuBRPscp0xGYIQR0PEHHga2mu9c/YBbS0AB1Y2vZ8Py2M9s2LUckcwKI/KXfuLJsBI8NsvDItrkLqWi1yBnc4tfnD7EPdfxP/xqOnGr4M5uBGrzFMH4NsLLW+0HLHpqhV54Ijs3HbR4sf7NO4kquFmt/JuRI2KyWV3oHVjpgo64h5XFwdBQ3mBSIx/eM/kQxJKmDaXvRwU/4= Content-ID: <66DD3682B53AC945810EB96916740A6A@namprd18.prod.outlook.com> MIME-Version: 1.0 X-MS-Exchange-CrossTenant-Network-Message-Id: daf288ce-ebff-4a33-1701-08d711049dd8 X-MS-Exchange-CrossTenant-originalarrivaltime: 25 Jul 2019 13:33:02.3599 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 856b813c-16e5-49a5-85ec-6f081e13b527 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: JBeulich@suse.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR18MB3297 X-OriginatorOrg: suse.com Subject: [Xen-devel] [PATCH v4 10/12] AMD/IOMMU: correct IRTE updating X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Andrew Cooper , Brian Woods , Suravee Suthikulpanit Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Flushing didn't get done along the lines of what the specification says. Mark entries to be updated as not remapped (which will result in interrupt requests to get target aborted, but the interrupts should be masked anyway at that point in time), issue the flush, and only then write the new entry. In update_intremap_entry_from_msi_msg() also fold the duplicate initial lock determination and acquire into just a single instance. Signed-off-by: Jan Beulich Acked-by: Andrew Cooper Acked-by: Brian Woods --- RFC: Putting the flush invocations in loops isn't overly nice, but I don't think this can really be abused, since callers up the stack hold further locks. Nevertheless I'd like to ask for better suggestions. --- v4: Re-base. v3: Remove stale parts of description. Re-base. v2: Parts morphed into earlier patch. --- a/xen/drivers/passthrough/amd/iommu_intr.c +++ b/xen/drivers/passthrough/amd/iommu_intr.c @@ -213,15 +213,13 @@ static void update_intremap_entry(const }, }; - ACCESS_ONCE(entry.ptr128->raw[0]) = 0; + ASSERT(!entry.ptr128->full.remap_en); + entry.ptr128->raw[1] = irte.raw[1]; /* - * Low half, in particular RemapEn, needs to be cleared first. See + * High half needs to be set before low one (containing RemapEn). See * comment in free_intremap_entry() regarding the choice of barrier. */ smp_wmb(); - entry.ptr128->raw[1] = irte.raw[1]; - /* High half needs to be set before low one (containing RemapEn). */ - smp_wmb(); ACCESS_ONCE(entry.ptr128->raw[0]) = irte.raw[0]; } else @@ -296,6 +294,20 @@ static int update_intremap_entry_from_io } entry = get_intremap_entry(iommu, req_id, offset); + + /* The RemapEn fields match for all formats. */ + while ( iommu->enabled && entry.ptr32->flds.remap_en ) + { + entry.ptr32->flds.remap_en = false; + spin_unlock(lock); + + spin_lock(&iommu->lock); + amd_iommu_flush_intremap(iommu, req_id); + spin_unlock(&iommu->lock); + + spin_lock(lock); + } + if ( fresh ) /* nothing */; else if ( !lo_update ) @@ -325,13 +337,6 @@ static int update_intremap_entry_from_io spin_unlock_irqrestore(lock, flags); - if ( iommu->enabled && !fresh ) - { - spin_lock_irqsave(&iommu->lock, flags); - amd_iommu_flush_intremap(iommu, req_id); - spin_unlock_irqrestore(&iommu->lock, flags); - } - set_rte_index(rte, offset); return 0; @@ -587,19 +592,27 @@ static int update_intremap_entry_from_ms req_id = get_dma_requestor_id(iommu->seg, bdf); alias_id = get_intremap_requestor_id(iommu->seg, bdf); + lock = get_intremap_lock(iommu->seg, req_id); + spin_lock_irqsave(lock, flags); + if ( msg == NULL ) { - lock = get_intremap_lock(iommu->seg, req_id); - spin_lock_irqsave(lock, flags); for ( i = 0; i < nr; ++i ) free_intremap_entry(iommu, req_id, *remap_index + i); spin_unlock_irqrestore(lock, flags); - goto done; - } - lock = get_intremap_lock(iommu->seg, req_id); + if ( iommu->enabled ) + { + spin_lock_irqsave(&iommu->lock, flags); + amd_iommu_flush_intremap(iommu, req_id); + if ( alias_id != req_id ) + amd_iommu_flush_intremap(iommu, alias_id); + spin_unlock_irqrestore(&iommu->lock, flags); + } + + return 0; + } - spin_lock_irqsave(lock, flags); dest_mode = (msg->address_lo >> MSI_ADDR_DESTMODE_SHIFT) & 0x1; delivery_mode = (msg->data >> MSI_DATA_DELIVERY_MODE_SHIFT) & 0x1; vector = (msg->data >> MSI_DATA_VECTOR_SHIFT) & MSI_DATA_VECTOR_MASK; @@ -623,6 +636,22 @@ static int update_intremap_entry_from_ms } entry = get_intremap_entry(iommu, req_id, offset); + + /* The RemapEn fields match for all formats. */ + while ( iommu->enabled && entry.ptr32->flds.remap_en ) + { + entry.ptr32->flds.remap_en = false; + spin_unlock(lock); + + spin_lock(&iommu->lock); + amd_iommu_flush_intremap(iommu, req_id); + if ( alias_id != req_id ) + amd_iommu_flush_intremap(iommu, alias_id); + spin_unlock(&iommu->lock); + + spin_lock(lock); + } + update_intremap_entry(iommu, entry, vector, delivery_mode, dest_mode, dest); spin_unlock_irqrestore(lock, flags); @@ -642,16 +671,6 @@ static int update_intremap_entry_from_ms get_ivrs_mappings(iommu->seg)[alias_id].intremap_table); } -done: - if ( iommu->enabled ) - { - spin_lock_irqsave(&iommu->lock, flags); - amd_iommu_flush_intremap(iommu, req_id); - if ( alias_id != req_id ) - amd_iommu_flush_intremap(iommu, alias_id); - spin_unlock_irqrestore(&iommu->lock, flags); - } - return 0; }