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banners=-,-,- X-VirusChecked: Checked Received: (qmail 48492 invoked from network); 3 Jul 2017 11:07:45 -0000 Received: from cn.fujitsu.com (HELO heian.cn.fujitsu.com) (59.151.112.132) by server-5.tower-27.messagelabs.com with SMTP; 3 Jul 2017 11:07:45 -0000 X-IronPort-AV: E=Sophos;i="5.22,518,1449504000"; d="scan'208";a="20783653" Received: from unknown (HELO cn.fujitsu.com) ([10.167.33.5]) by heian.cn.fujitsu.com with ESMTP; 03 Jul 2017 19:07:46 +0800 Received: from G08CNEXCHPEKD03.g08.fujitsu.local (unknown [10.167.33.85]) by cn.fujitsu.com (Postfix) with ESMTP id AE56F4801999; Mon, 3 Jul 2017 19:07:42 +0800 (CST) Received: from localhost.localdomain.localdomain (10.167.226.106) by G08CNEXCHPEKD03.g08.fujitsu.local (10.167.33.89) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 3 Jul 2017 19:07:47 +0800 From: Dou Liyang To: , , Date: Mon, 3 Jul 2017 19:07:22 +0800 Message-ID: <135f9d5a8c5f21b8ae61fb07778172c2a976dde3.1499074567.git.douly.fnst@cn.fujitsu.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.167.226.106] X-yoursite-MailScanner-ID: AE56F4801999.A2813 X-yoursite-MailScanner: Found to be clean X-yoursite-MailScanner-From: douly.fnst@cn.fujitsu.com Cc: Dou Liyang , bhe@redhat.com, peterz@infradead.org, mingo@kernel.org, ebiederm@xmission.com, hpa@zytor.com, izumi.taku@jp.fujitsu.com, boris.ostrovsky@oracle.com, tglx@linutronix.de Subject: [Xen-devel] [PATCH v6 02/12] x86/apic: Prepare for unifying the interrupt delivery modes setup X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP There are three positions for initializing the interrupt delivery modes: 1) In IRQ initial function, may setup the through-local-APIC virtual wire mode. 2) In an SMP-capable system, will try to switch to symmetric I/O model when preparing the cpus in native_smp_prepare_cpus(). 3) In UP system with UP_LATE_INIT=y, will set up local APIC and I/O APIC in smp_init(). Switching to symmetric I/O mode is so late, which causes kernel in an unmatched mode at the beginning of booting time. And it causes the dump-capture kernel hangs with 'notsc' option inherited from 1st kernel option. Provide a new function to unify that three positions. Preparatory patch to initialize an interrupt mode directly. Signed-off-by: Dou Liyang --- arch/x86/include/asm/apic.h | 2 ++ arch/x86/kernel/apic/apic.c | 16 ++++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index bdffcd9..ddc16ff 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -128,6 +128,7 @@ extern void disable_local_APIC(void); extern void lapic_shutdown(void); extern void sync_Arb_IDs(void); extern void init_bsp_APIC(void); +extern void apic_intr_mode_init(void); extern void setup_local_APIC(void); extern void init_apic_mappings(void); void register_lapic_address(unsigned long address); @@ -170,6 +171,7 @@ static inline void disable_local_APIC(void) { } # define setup_boot_APIC_clock x86_init_noop # define setup_secondary_APIC_clock x86_init_noop static inline void lapic_update_tsc_freq(void) { } +static inline void apic_intr_mode_init(void) { } #endif /* !CONFIG_X86_LOCAL_APIC */ #ifdef CONFIG_X86_X2APIC diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index ad5a853..3f22717 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1265,6 +1265,22 @@ void __init init_bsp_APIC(void) apic_write(APIC_LVT1, value); } +/* Init the interrupt delivery mode for the BSP */ +void __init apic_intr_mode_init(void) +{ + switch (apic_intr_mode_select()) { + case APIC_PIC: + pr_info("APIC: keep in PIC mode(8259)\n"); + return; + case APIC_VIRTUAL_WIRE: + pr_info("APIC: switch to virtual wire mode setup\n"); + return; + case APIC_SYMMETRIC_IO: + pr_info("APIC: switch to symmectic I/O mode setup\n"); + return; + } +} + static void lapic_setup_esr(void) { unsigned int oldvalue, value, maxlvt;