From patchwork Sat Jan 23 09:20:08 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 8096291 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 57362BEEE5 for ; Sat, 23 Jan 2016 09:28:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 81B13205E4 for ; Sat, 23 Jan 2016 09:28:08 +0000 (UTC) Received: from lists.xen.org (lists.xenproject.org [50.57.142.19]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 98352205B1 for ; Sat, 23 Jan 2016 09:28:07 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aMuSS-0000PK-WC; Sat, 23 Jan 2016 09:26:13 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aMuSR-0000P0-7h for xen-devel@lists.xen.org; Sat, 23 Jan 2016 09:26:11 +0000 Received: from [193.109.254.147] by server-16.bemta-14.messagelabs.com id B5/2A-15991-23743A65; Sat, 23 Jan 2016 09:26:10 +0000 X-Env-Sender: zhaoshenglong@huawei.com X-Msg-Ref: server-3.tower-27.messagelabs.com!1453541167!18561683!1 X-Originating-IP: [119.145.14.66] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTE5LjE0NS4xNC42NiA9PiA4NTI3\n X-StarScan-Received: X-StarScan-Version: 7.35.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 47807 invoked from network); 23 Jan 2016 09:26:09 -0000 Received: from szxga03-in.huawei.com (HELO szxga03-in.huawei.com) (119.145.14.66) by server-3.tower-27.messagelabs.com with SMTP; 23 Jan 2016 09:26:09 -0000 Received: from 172.24.1.49 (EHLO szxeml427-hub.china.huawei.com) ([172.24.1.49]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id BVC82178; Sat, 23 Jan 2016 17:22:30 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by szxeml427-hub.china.huawei.com (10.82.67.182) with Microsoft SMTP Server id 14.3.235.1; Sat, 23 Jan 2016 17:22:22 +0800 From: Shannon Zhao To: Date: Sat, 23 Jan 2016 17:20:08 +0800 Message-ID: <1453540813-15764-17-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1453540813-15764-1-git-send-email-zhaoshenglong@huawei.com> References: <1453540813-15764-1-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090204.56A34657.0028, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: e0c964a6118fc1ed88720907860965a8 Cc: ian.campbell@citrix.com, stefano.stabellini@eu.citrix.com, peter.huangpeng@huawei.com, julien.grall@citrix.com, stefano.stabellini@citrix.com, shannon.zhao@linaro.org Subject: [Xen-devel] [PATCH v4 16/21] arm/irq: Add helper function for setting interrupt type X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Parth Dixit Add a helper function to set edge/level type information for an interrupt. Signed-off-by: Parth Dixit Signed-off-by: Shannon Zhao Acked-by: Stefano Stabellini --- xen/arch/arm/irq.c | 27 ++++++++++++++++----------- xen/include/asm-arm/irq.h | 2 ++ 2 files changed, 18 insertions(+), 11 deletions(-) diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c index 0ff5cbc..2f8af72 100644 --- a/xen/arch/arm/irq.c +++ b/xen/arch/arm/irq.c @@ -655,27 +655,32 @@ unlock: return ret; } +int irq_set_type(unsigned int irq, unsigned int type) +{ + int res; + + /* Setup the IRQ type */ + if ( irq < NR_LOCAL_IRQS ) + res = irq_local_set_type(irq, type); + else + res = irq_set_spi_type(irq, type); + + return res; +} + int platform_get_irq(const struct dt_device_node *device, int index) { struct dt_irq dt_irq; unsigned int type, irq; - int res; - res = dt_device_get_irq(device, index, &dt_irq); - if ( res ) + if ( dt_device_get_irq(device, index, &dt_irq) ) return -1; irq = dt_irq.irq; type = dt_irq.type; - /* Setup the IRQ type */ - if ( irq < NR_LOCAL_IRQS ) - res = irq_local_set_type(irq, type); - else - res = irq_set_spi_type(irq, type); - - if ( res ) - return -1; + if ( irq_set_type(irq, type) ) + return -1; return irq; } diff --git a/xen/include/asm-arm/irq.h b/xen/include/asm-arm/irq.h index f33c331..493773c 100644 --- a/xen/include/asm-arm/irq.h +++ b/xen/include/asm-arm/irq.h @@ -52,6 +52,8 @@ void arch_move_irqs(struct vcpu *v); /* Set IRQ type for an SPI */ int irq_set_spi_type(unsigned int spi, unsigned int type); +int irq_set_type(unsigned int irq, unsigned int type); + int platform_get_irq(const struct dt_device_node *device, int index); void irq_set_affinity(struct irq_desc *desc, const cpumask_t *cpu_mask);