@@ -61,6 +61,8 @@ DEFINE_PER_CPU(struct rdist, rdist);
/* Enable/Disable ITS support */
static bool_t its_enable = 0;
+/* Availability of ITS support after successful ITS initialization */
+static bool_t its_enabled = 0;
static void __init parse_its_param(char *s)
{
@@ -743,6 +745,10 @@ static int gicv3_cpu_init(void)
if ( gicv3_enable_redist() )
return -ENODEV;
+ /* Give LPIs a spin */
+ if ( gicv3_dist_supports_lpis() )
+ its_cpu_init();
+
/* Set priority on PPI and SGI interrupts */
priority = (GIC_PRI_IPI << 24 | GIC_PRI_IPI << 16 | GIC_PRI_IPI << 8 |
GIC_PRI_IPI);
@@ -1346,8 +1352,11 @@ static int __init gicv3_init(void)
i, r->base, r->base + r->size);
}
- vgic_v3_setup_hw(dbase, gicv3.rdist_count, gicv3.rdist_regions,
- gicv3.rdist_stride);
+ reg = readl_relaxed(GICD + GICD_TYPER);
+
+ gicv3.rdist_data.id_bits = ((reg >> GICD_TYPER_ID_BITS_SHIFT) &
+ GICD_TYPER_ID_BITS_MASK) + 1;
+
gicv3_init_v2(node, dbase);
spin_lock_init(&gicv3.lock);
@@ -1355,6 +1364,26 @@ static int __init gicv3_init(void)
spin_lock(&gicv3.lock);
gicv3_dist_init();
+
+ if ( its_enable && gicv3_dist_supports_lpis() )
+ {
+ /*
+ * LPI support is enabled only if HW supports it and
+ * ITS dt node is available
+ */
+ if ( !its_init(&gicv3.rdist_data) )
+ its_enabled = 1;
+ else
+ {
+ /* ITS initiazation failed. Reset nr_irq_ids to SPIs */
+ gicv3_info.nr_irq_ids = gicv3_info.nr_lines;
+ nr_lpis = 0;
+ }
+ }
+
+ vgic_v3_setup_hw(dbase, gicv3.rdist_count, gicv3.rdist_regions,
+ gicv3.rdist_stride, its_enabled);
+
res = gicv3_cpu_init();
gicv3_hyp_init();
@@ -50,6 +50,8 @@
static struct {
bool_t enabled;
+ /* Check if its supported */
+ bool_t its_support;
/* Distributor interface address */
paddr_t dbase;
/* Re-distributor regions */
@@ -61,9 +63,10 @@ static struct {
void vgic_v3_setup_hw(paddr_t dbase,
unsigned int nr_rdist_regions,
const struct rdist_region *regions,
- uint32_t rdist_stride)
+ uint32_t rdist_stride, bool_t its_support)
{
vgic_v3_hw.enabled = 1;
+ vgic_v3_hw.its_support = its_support;
vgic_v3_hw.dbase = dbase;
vgic_v3_hw.nr_rdist_regions = nr_rdist_regions;
vgic_v3_hw.regions = regions;
@@ -45,6 +45,7 @@
/* Additional bits in GICD_TYPER defined by GICv3 */
#define GICD_TYPER_ID_BITS_SHIFT (19)
+#define GICD_TYPER_ID_BITS_MASK (0x1f)
#define GICD_TYPER_LPIS_SUPPORTED (1U << 17)
#define GICD_CTLR_RWP (1UL << 31)
@@ -341,7 +341,7 @@ struct rdist_region;
void vgic_v3_setup_hw(paddr_t dbase,
unsigned int nr_rdist_regions,
const struct rdist_region *regions,
- uint32_t rdist_stride);
+ uint32_t rdist_stride, bool_t its_support);
#endif
#endif /* __ASM_ARM_VGIC_H__ */