From patchwork Tue Feb 2 07:35:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huaitong Han X-Patchwork-Id: 8187321 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8C684BEEE5 for ; Tue, 2 Feb 2016 07:38:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BE1FA20266 for ; Tue, 2 Feb 2016 07:38:55 +0000 (UTC) Received: from lists.xen.org (lists.xenproject.org [50.57.142.19]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 11B0920268 for ; Tue, 2 Feb 2016 07:38:53 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aQVVI-0007N3-6i; Tue, 02 Feb 2016 07:36:00 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aQVVG-0007Lv-Fi for xen-devel@lists.xen.org; Tue, 02 Feb 2016 07:35:58 +0000 Received: from [85.158.137.68] by server-5.bemta-3.messagelabs.com id 48/09-07651-D5C50B65; Tue, 02 Feb 2016 07:35:57 +0000 X-Env-Sender: huaitong.han@intel.com X-Msg-Ref: server-3.tower-31.messagelabs.com!1454398546!19667281!4 X-Originating-IP: [192.55.52.93] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTkyLjU1LjUyLjkzID0+IDMyNDY2NQ==\n X-StarScan-Received: X-StarScan-Version: 7.35.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 28134 invoked from network); 2 Feb 2016 07:35:57 -0000 Received: from mga11.intel.com (HELO mga11.intel.com) (192.55.52.93) by server-3.tower-31.messagelabs.com with SMTP; 2 Feb 2016 07:35:57 -0000 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga102.fm.intel.com with ESMTP; 01 Feb 2016 23:35:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,384,1449561600"; d="scan'208";a="903620422" Received: from huaitong-desk.bj.intel.com ([10.238.135.53]) by orsmga002.jf.intel.com with ESMTP; 01 Feb 2016 23:35:53 -0800 From: Huaitong Han To: jbeulich@suse.com, andrew.cooper3@citrix.com, george.dunlap@eu.citrix.com, tim@xen.org, keir@xen.org Date: Tue, 2 Feb 2016 15:35:40 +0800 Message-Id: <1454398542-4815-4-git-send-email-huaitong.han@intel.com> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1454398542-4815-1-git-send-email-huaitong.han@intel.com> References: <1454398542-4815-1-git-send-email-huaitong.han@intel.com> Cc: Huaitong Han , xen-devel@lists.xen.org Subject: [Xen-devel] [PATCH V8 3/5] x86/hvm: pkeys, add xstate support for pkeys X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The XSAVE feature set can operate on PKRU state only if the feature set is enabled (CR4.OSXSAVE = 1) and has been configured to manage PKRU state (XCR0[9] = 1). And XCR0.PKRU is disabled on PV mode without PKU feature enabled. Signed-off-by: Huaitong Han Reviewed-by: Andrew Cooper --- Changes in v7: *Use EOPNOTSUPP instead of EINVAL as return value on is_pv_vcpu condition. xen/arch/x86/xstate.c | 4 ++++ xen/include/asm-x86/xstate.h | 4 +++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/xstate.c b/xen/arch/x86/xstate.c index 4e87ab3..50d9e48 100644 --- a/xen/arch/x86/xstate.c +++ b/xen/arch/x86/xstate.c @@ -579,6 +579,10 @@ int handle_xsetbv(u32 index, u64 new_bv) if ( (new_bv & ~xfeature_mask) || !valid_xcr0(new_bv) ) return -EINVAL; + /* XCR0.PKRU is disabled on PV mode. */ + if ( is_pv_vcpu(curr) && (new_bv & XSTATE_PKRU) ) + return -EOPNOTSUPP; + if ( !set_xcr0(new_bv) ) return -EFAULT; diff --git a/xen/include/asm-x86/xstate.h b/xen/include/asm-x86/xstate.h index 12d939b..f7c41ba 100644 --- a/xen/include/asm-x86/xstate.h +++ b/xen/include/asm-x86/xstate.h @@ -34,13 +34,15 @@ #define XSTATE_OPMASK (1ULL << 5) #define XSTATE_ZMM (1ULL << 6) #define XSTATE_HI_ZMM (1ULL << 7) +#define XSTATE_PKRU (1ULL << 9) #define XSTATE_LWP (1ULL << 62) /* AMD lightweight profiling */ #define XSTATE_FP_SSE (XSTATE_FP | XSTATE_SSE) #define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE | XSTATE_YMM | XSTATE_OPMASK | \ XSTATE_ZMM | XSTATE_HI_ZMM | XSTATE_NONLAZY) #define XSTATE_ALL (~(1ULL << 63)) -#define XSTATE_NONLAZY (XSTATE_LWP | XSTATE_BNDREGS | XSTATE_BNDCSR) +#define XSTATE_NONLAZY (XSTATE_LWP | XSTATE_BNDREGS | XSTATE_BNDCSR | \ + XSTATE_PKRU) #define XSTATE_LAZY (XSTATE_ALL & ~XSTATE_NONLAZY) #define XSTATE_COMPACTION_ENABLED (1ULL << 63)