From patchwork Fri Feb 5 13:42:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Cooper X-Patchwork-Id: 8234881 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id AD3EB9F38B for ; Fri, 5 Feb 2016 14:04:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 35B3C2039E for ; Fri, 5 Feb 2016 14:04:55 +0000 (UTC) Received: from lists.xen.org (lists.xenproject.org [50.57.142.19]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A5C1E20397 for ; Fri, 5 Feb 2016 14:04:53 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aRgxb-0000CY-Rw; Fri, 05 Feb 2016 14:02:07 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aRgxZ-0000Ab-V3 for xen-devel@lists.xen.org; Fri, 05 Feb 2016 14:02:06 +0000 Received: from [193.109.254.147] by server-10.bemta-14.messagelabs.com id D6/02-25438-D5BA4B65; Fri, 05 Feb 2016 14:02:05 +0000 X-Env-Sender: prvs=8364524b4=Andrew.Cooper3@citrix.com X-Msg-Ref: server-6.tower-27.messagelabs.com!1454680920!21830103!4 X-Originating-IP: [66.165.176.89] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni44OSA9PiAyMDMwMDc=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 7.35.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 51208 invoked from network); 5 Feb 2016 14:02:04 -0000 Received: from smtp.citrix.com (HELO SMTP.CITRIX.COM) (66.165.176.89) by server-6.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 5 Feb 2016 14:02:04 -0000 X-IronPort-AV: E=Sophos;i="5.22,400,1449532800"; d="scan'208";a="329920304" From: Andrew Cooper To: Xen-devel Date: Fri, 5 Feb 2016 13:42:15 +0000 Message-ID: <1454679743-18133-23-git-send-email-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1454679743-18133-1-git-send-email-andrew.cooper3@citrix.com> References: <1454679743-18133-1-git-send-email-andrew.cooper3@citrix.com> MIME-Version: 1.0 X-DLP: MIA1 Cc: Andrew Cooper Subject: [Xen-devel] [PATCH v2 22/30] x86/domctl: Update PV domain cpumasks when setting cpuid policy X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This allows PV domains with different featuresets to observe different values from a native cpuid instruction, on supporting hardware. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- v2: * Use switch() rather than if/elseif chain * Clamp to static PV featuremask --- xen/arch/x86/domctl.c | 88 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 88 insertions(+) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 55aecdc..f06bc02 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -36,6 +36,7 @@ #include #include #include +#include static int gdbsx_guest_mem_io(domid_t domid, struct xen_domctl_gdbsx_memio *iop) { @@ -87,6 +88,93 @@ static void update_domain_cpuid_info(struct domain *d, d->arch.x86_model = (ctl->eax >> 4) & 0xf; if ( d->arch.x86 >= 0x6 ) d->arch.x86_model |= (ctl->eax >> 12) & 0xf0; + + if ( is_pv_domain(d) ) + { + uint64_t mask = cpuidmask_defaults._1cd; + uint32_t ecx = ctl->ecx & pv_featureset[FEATURESET_1c]; + uint32_t edx = ctl->edx & pv_featureset[FEATURESET_1d]; + + switch ( boot_cpu_data.x86_vendor ) + { + case X86_VENDOR_INTEL: + mask &= ((uint64_t)edx << 32) | ecx; + break; + + case X86_VENDOR_AMD: + mask &= ((uint64_t)ecx << 32) | edx; + break; + } + + d->arch.pv_domain.cpuidmasks->_1cd = mask; + } + break; + + case 6: + if ( is_pv_domain(d) ) + { + uint64_t mask = cpuidmask_defaults._6c; + + if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) + mask &= (~0ULL << 32) | ctl->ecx; + + d->arch.pv_domain.cpuidmasks->_6c = mask; + } + break; + + case 7: + if ( ctl->input[1] != 0 ) + break; + + if ( is_pv_domain(d) ) + { + uint64_t mask = cpuidmask_defaults._7ab0; + uint32_t eax = ctl->eax; + uint32_t ebx = ctl->ebx & pv_featureset[FEATURESET_7b0]; + + if ( boot_cpu_data.x86_vendor == X86_VENDOR_AMD ) + mask &= ((uint64_t)eax << 32) | ebx; + + d->arch.pv_domain.cpuidmasks->_7ab0 = mask; + } + break; + + case 0xd: + if ( ctl->input[1] != 1 ) + break; + + if ( is_pv_domain(d) ) + { + uint64_t mask = cpuidmask_defaults.Da1; + uint32_t eax = ctl->eax & pv_featureset[FEATURESET_Da1]; + + if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) + mask &= (~0ULL << 32) | eax; + + d->arch.pv_domain.cpuidmasks->Da1 = mask; + } + break; + + case 0x80000001: + if ( is_pv_domain(d) ) + { + uint64_t mask = cpuidmask_defaults.e1cd; + uint32_t ecx = ctl->ecx & pv_featureset[FEATURESET_e1c]; + uint32_t edx = ctl->edx & pv_featureset[FEATURESET_e1d]; + + switch ( boot_cpu_data.x86_vendor ) + { + case X86_VENDOR_INTEL: + mask &= ((uint64_t)edx << 32) | ecx; + break; + + case X86_VENDOR_AMD: + mask &= ((uint64_t)ecx << 32) | edx; + break; + } + + d->arch.pv_domain.cpuidmasks->e1cd = mask; + } break; } }