@@ -1205,6 +1205,37 @@ void __init noreturn __start_xen(unsigned long mbi_p)
~((1UL << L2_PAGETABLE_SHIFT) - 1);
destroy_xen_mappings(xen_virt_end, XEN_VIRT_START + BOOTSTRAP_MAP_BASE);
+ /*
+ * If not using 2M mappings to gain suitable pagetable permissions
+ * directly from the relocation above, remap the code/data
+ * sections with decreased permissions.
+ */
+ if ( !using_2M_mapping() )
+ {
+ /* Mark .text as RX (avoiding the first 2M superpage). */
+ map_pages_to_xen(XEN_VIRT_START + MB(2),
+ PFN_DOWN(__pa(XEN_VIRT_START + MB(2))),
+ PFN_DOWN(__2M_text_end -
+ (const char *)(XEN_VIRT_START + MB(2))),
+ PAGE_HYPERVISOR_RX);
+
+ /* Mark .rodata as RO. */
+ map_pages_to_xen((unsigned long)&__2M_rodata_start,
+ PFN_DOWN(__pa(__2M_rodata_start)),
+ PFN_DOWN(__2M_rodata_end - __2M_rodata_start),
+ PAGE_HYPERVISOR_RO);
+
+ /* Mark .data and .bss as RW. */
+ map_pages_to_xen((unsigned long)&__2M_rwdata_start,
+ PFN_DOWN(__pa(__2M_rwdata_start)),
+ PFN_DOWN(__2M_rwdata_end - __2M_rwdata_start),
+ PAGE_HYPERVISOR_RW);
+
+ /* Drop the remaining mappings in the shattered superpage. */
+ destroy_xen_mappings((unsigned long)&__2M_rwdata_end,
+ ROUNDUP((unsigned long)&__2M_rwdata_end, MB(2)));
+ }
+
nr_pages = 0;
for ( i = 0; i < e820.nr_map; i++ )
if ( e820.map[i].type == E820_RAM )
@@ -56,6 +56,8 @@ SECTIONS
#ifdef EFI
. = ALIGN(MB(2));
+#else
+ . = ALIGN(PAGE_SIZE);
#endif
__2M_text_end = .;
@@ -99,6 +101,8 @@ SECTIONS
#ifdef EFI
. = ALIGN(MB(2));
+#else
+ . = ALIGN(PAGE_SIZE);
#endif
__2M_rodata_end = .;
@@ -168,6 +172,8 @@ SECTIONS
#ifdef EFI
. = ALIGN(MB(2));
+#else
+ . = ALIGN(PAGE_SIZE);
#endif
__2M_init_end = .;
@@ -212,6 +218,8 @@ SECTIONS
#ifdef EFI
. = ALIGN(MB(2));
+#else
+ . = ALIGN(PAGE_SIZE);
#endif
__2M_rwdata_end = .;
@@ -270,6 +278,14 @@ ASSERT(IS_ALIGNED(__2M_init_start, MB(2)), "__2M_init_start misaligned")
ASSERT(IS_ALIGNED(__2M_init_end, MB(2)), "__2M_init_end misaligned")
ASSERT(IS_ALIGNED(__2M_rwdata_start, MB(2)), "__2M_rwdata_start misaligned")
ASSERT(IS_ALIGNED(__2M_rwdata_end, MB(2)), "__2M_rwdata_end misaligned")
+#else
+ASSERT(IS_ALIGNED(__2M_text_end, PAGE_SIZE), "__2M_text_end misaligned")
+ASSERT(IS_ALIGNED(__2M_rodata_start, PAGE_SIZE), "__2M_rodata_start misaligned")
+ASSERT(IS_ALIGNED(__2M_rodata_end, PAGE_SIZE), "__2M_rodata_end misaligned")
+ASSERT(IS_ALIGNED(__2M_init_start, PAGE_SIZE), "__2M_init_start misaligned")
+ASSERT(IS_ALIGNED(__2M_init_end, PAGE_SIZE), "__2M_init_end misaligned")
+ASSERT(IS_ALIGNED(__2M_rwdata_start, PAGE_SIZE), "__2M_rwdata_start misaligned")
+ASSERT(IS_ALIGNED(__2M_rwdata_end, PAGE_SIZE), "__2M_rwdata_end misaligned")
#endif
ASSERT(IS_ALIGNED(cpu0_stack, STACK_SIZE), "cpu0_stack misaligned")
c/s cf39362 "x86: use 2M superpages for text/data/bss mappings" served two purposes; to map the primary code and data with appropriate pagetable permissions (rather than unilaterally RWX), and to reduce the TLB pressure. The extra alignment exposed a SYSLinux issue, and was partly reverted by c/s 0b8a172 "x86: partially revert use of 2M mappings for hypervisor image". This change reinstates the pagetable permission improvements while avoiding the 2M alignment issue. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> --- CC: Jan Beulich <JBeulich@suse.com> v2: Move the remapping earlier in the boot sequence. This is where memguart_init() used to reside, which itself used map_pages_to_xen() on the full virtual region. --- xen/arch/x86/setup.c | 31 +++++++++++++++++++++++++++++++ xen/arch/x86/xen.lds.S | 16 ++++++++++++++++ 2 files changed, 47 insertions(+)