From patchwork Thu Apr 7 12:03:26 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 8772041 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1EB37C0553 for ; Thu, 7 Apr 2016 12:12:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 353D42024F for ; Thu, 7 Apr 2016 12:12:51 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 40DA3201ED for ; Thu, 7 Apr 2016 12:12:50 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ao8m7-0004Wn-WD; Thu, 07 Apr 2016 12:11:03 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1ao8m6-0004W1-3E for xen-devel@lists.xen.org; Thu, 07 Apr 2016 12:11:02 +0000 Received: from [85.158.137.68] by server-9.bemta-3.messagelabs.com id A8/59-03814-55E46075; Thu, 07 Apr 2016 12:11:01 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrKIsWRWlGSWpSXmKPExsVSPpHPSTfEjy3 c4MlUY4slHxezODB6HN39mymAMYo1My8pvyKBNWP5vZXMBSt5K6bf7mFtYJzP3cXIxSEkcIZR 4uG6DnYIZzejxMnet0AOJwebgK7Ex41TgGwODhEBF4ljn71AapgFtjFJHG3dxgYSFxbIk9j8I w7EZBFQkWj7mgjSySvgKfH62Ss2EFtCQENiZe8EFhCbEyje1j6RFcQWEvCQ2NEyjwmiXlDi5M wnYDXMAhISB1+8YIboVZRoW38Sao6kxMEVN1hATpAQOMUoseNkPyPIXgkBU4kVUxImMArOQjJ qFpJRCxiZVjFqFKcWlaUW6Rqa6CUVZaZnlOQmZuboGhoY6+WmFhcnpqfmJCYV6yXn525iBAYn AxDsYFyx3fMQoyQHk5Io73RXtnAhvqT8lMqMxOKM+KLSnNTiQ4wyHBxKErzOvkA5waLU9NSKt MwcYJzApCU4eJREePf6AKV5iwsSc4sz0yFSpxgVpcR5PUD6BEASGaV5cG2w2LzEKCslzMsIdI gQT0FqUW5mCar8K0ZxDkYlYYjtPJl5JXDTXwEtZgJafIEfbHFJIkJKqoGxKMiouODdpMN9zXV LylPPvFY6Pedq3vebumniXhMObins5fyTVS3Ndat++fw/rT77InML+SoZqzZo6SwLZli880up WNaUE0kau39ckU0IuXdg04T2t3mse2W7Z1W9+m/9T8ykafvaz2yJDiqhcjnJd+OFtQ/8/fsqR Gju6ytc3q80bdkmLRNTYinOSDTUYi4qTgQAMHgz6cgCAAA= X-Env-Sender: zhaoshenglong@huawei.com X-Msg-Ref: server-10.tower-31.messagelabs.com!1460031056!32868209!1 X-Originating-IP: [119.145.14.66] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTE5LjE0NS4xNC42NiA9PiA4NTI3\n X-StarScan-Received: X-StarScan-Version: 8.28; banners=-,-,- X-VirusChecked: Checked Received: (qmail 49437 invoked from network); 7 Apr 2016 12:11:00 -0000 Received: from szxga03-in.huawei.com (HELO szxga03-in.huawei.com) (119.145.14.66) by server-10.tower-31.messagelabs.com with RC4-SHA encrypted SMTP; 7 Apr 2016 12:11:00 -0000 Received: from 172.24.1.136 (EHLO SZXEML424-HUB.china.huawei.com) ([172.24.1.136]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id BZL25442; Thu, 07 Apr 2016 20:04:23 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by SZXEML424-HUB.china.huawei.com (10.82.67.153) with Microsoft SMTP Server id 14.3.235.1; Thu, 7 Apr 2016 20:04:13 +0800 From: Shannon Zhao To: , Date: Thu, 7 Apr 2016 20:03:26 +0800 Message-ID: <1460030614-16112-10-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1460030614-16112-1-git-send-email-zhaoshenglong@huawei.com> References: <1460030614-16112-1-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090205.57064CC7.00D6, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 1daae312066b4750bce6ee6cc58e19b1 Cc: devicetree@vger.kernel.org, linux-efi@vger.kernel.org, catalin.marinas@arm.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, xen-devel@lists.xen.org, julien.grall@arm.com, david.vrabel@citrix.com, peter.huangpeng@huawei.com, shannon.zhao@linaro.org Subject: [Xen-devel] [PATCH v11 09/17] xen/hvm/params: Add a new delivery type for event-channel in HVM_PARAM_CALLBACK_IRQ X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Shannon Zhao This new delivery type which is for ARM shares the same value with HVM_PARAM_CALLBACK_TYPE_VECTOR which is for x86. val[15:8] is flag: val[7:0] is a PPI. To the flag, bit 8 stands the interrupt mode is edge(1) or level(0) and bit 9 stands the interrupt polarity is active low(1) or high(0). Signed-off-by: Shannon Zhao Acked-by: Stefano Stabellini Reviewed-by: Julien Grall --- include/xen/interface/hvm/params.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/include/xen/interface/hvm/params.h b/include/xen/interface/hvm/params.h index 70ad208..4d61fc5 100644 --- a/include/xen/interface/hvm/params.h +++ b/include/xen/interface/hvm/params.h @@ -47,11 +47,24 @@ * Domain = val[47:32], Bus = val[31:16] DevFn = val[15:8], IntX = val[1:0] */ +#if defined(__i386__) || defined(__x86_64__) #define HVM_PARAM_CALLBACK_TYPE_VECTOR 2 /* * val[7:0] is a vector number. Check for XENFEAT_hvm_callback_vector to know * if this delivery method is available. */ +#elif defined(__arm__) || defined(__aarch64__) +#define HVM_PARAM_CALLBACK_TYPE_PPI 2 +/* + * val[55:16] needs to be zero. + * val[15:8] is interrupt flag of the PPI used by event-channel: + * bit 8: the PPI is edge(1) or level(0) triggered + * bit 9: the PPI is active low(1) or high(0) + * val[7:0] is a PPI number used by event-channel. + * This is only used by ARM/ARM64 and masking/eoi the interrupt associated to + * the notification is handled by the interrupt controller. + */ +#endif #define HVM_PARAM_STORE_PFN 1 #define HVM_PARAM_STORE_EVTCHN 2